Commit message (Collapse) | Author | Age | Files | Lines | |
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* | clk: hisilicon: add CRG driver for hi3519 soc | Jiancheng Xue | 2016-05-06 | 1 | -0/+40 |
The CRG(Clock and Reset Generator) block provides clock and reset signals for other modules in hi3519 soc. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |