Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | drm/i915/icl: Program T_INIT_MASTER registers | Madhav Chauhan | 2018-09-24 | 1 | -0/+19 |
* | drm/i915/icl: Enable DDI Buffer | Madhav Chauhan | 2018-09-24 | 1 | -0/+22 |
* | drm/i915/icl: DSI vswing programming sequence | Madhav Chauhan | 2018-09-24 | 1 | -0/+120 |
* | drm/i915/icl: Configure lane sequencing of combo phy transmitter | Madhav Chauhan | 2018-09-24 | 1 | -0/+39 |
* | drm/i915/icl: Power down unused DSI lanes | Madhav Chauhan | 2018-07-06 | 1 | -0/+40 |
* | drm/i915/icl: Enable DSI IO power | Madhav Chauhan | 2018-07-06 | 1 | -0/+23 |
* | drm/i915/icl: Program DSI Escape clock Divider | Madhav Chauhan | 2018-07-06 | 1 | -0/+64 |