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path: root/drivers/gpu/drm/armada/armada_510.c
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* drm/armada: push responsibility for clock management to backendRussell King2018-07-301-0/+19
| | | | | | | | Push responsibility for managing the clock during DPMS down into the variant backend, rather than the CRTC layer having knowledge of its state. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
* drm/armada: clean up SPU_ADV_REGRussell King2018-07-301-1/+4
| | | | | | | | Rather than writing all bits of SPU_ADV_REG on modeset, only write what we need to change, and initialise the register in the variant initialisation. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
* drm/armada: Remove unused #include <drmP.h>Haneen Mohammed2017-09-291-1/+0
| | | | | | | | | Remove drmP.h as it is not needed anymore since nothing it defines is used in these files. Signed-off-by: Haneen Mohammed <hamohammed.sa@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20170927073846.GA14352@Haneen
* drm/armada: update Armada 510 (Dove) to use "ext_ref_clk1" as the clockRussell King2014-07-111-1/+1
| | | | | | | Remove the underscore between "clk" and "1" so that we match the name of the clock given in the documentation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* drm/armada: make variant a CRTC thingRussell King2014-07-031-2/+2
| | | | | | | Move the variant pointer into the armada_crtc structure, and update for the resulting changes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* drm/armada: move variant initialisation to CRTC initRussell King2014-07-031-11/+8
| | | | | | | | Move the variant initialisation entirely to the CRTC init function - the variant support is really about the CRTC properties than the whole system, and we want to treat each CRTC individually when we support DT. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* DRM: Armada: Add support for ARGB 32x64 or 64x32 hardware cursorsRussell King2013-10-181-0/+1
| | | | | | | | | | This patch adds ARGB hardware cursor support to the DRM driver for the Marvell Armada SoCs. ARGB cursors are supported at either 32x64 or 64x32 resolutions. Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* DRM: Armada: Add Armada DRM driverRussell King2013-10-121-0/+86
This patch adds support for the pair of LCD controllers on the Marvell Armada 510 SoCs. This driver supports: - multiple contiguous scanout buffers for video and graphics - shm backed cacheable buffer objects for X pixmaps for Vivante GPU acceleration - dual lcd0 and lcd1 crt operation - video overlay on each LCD crt via DRM planes - page flipping of the main scanout buffers - DRM prime for buffer export/import This driver is trivial to extend to other Armada SoCs. Included in this commit is the core driver with no output support; output support is platform and encoder driver dependent. Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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