Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: tegra: fix vi_sensor clocks on Tegra124 | Peter De Schrijver | 2014-06-25 | 1 | -2/+2 |
* | clk: tegra: Fix xusb_hs_src clock hierarchy | Andrew Bresticker | 2014-05-22 | 1 | -0/+6 |
* | clk: tegra: Fix xusb_fs_src mux | Jim Lin | 2014-05-22 | 1 | -1/+3 |
* | clk: tegra: Fix vic03 mux index | Peter De Schrijver | 2014-02-20 | 1 | -3/+1 |
* | clk: tegra: fix sdmmc clks on Tegra1x4 | Andrew Bresticker | 2014-02-17 | 1 | -0/+4 |
* | clk: tegra: Correct clock number for UARTE | Thierry Reding | 2014-02-17 | 1 | -1/+1 |
* | clk: tegra124: Add new peripheral clocks | Peter De Schrijver | 2013-11-26 | 1 | -0/+69 |
* | clk: tegra: add TEGRA_PERIPH_NO_GATE | Peter De Schrijver | 2013-11-26 | 1 | -0/+6 |
* | clk: tegra: add locking to periph clks | Peter De Schrijver | 2013-11-26 | 1 | -15/+18 |
* | clk: tegra: move periph clocks to common file | Peter De Schrijver | 2013-11-26 | 1 | -0/+596 |