talos-obmc-linux - Talos™ II Linux sources for OpenBMC

	Commit message (Expand)	Author	Age	Files	Lines
*	clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate	Jernej Skrabec	2018-03-02	1	-3/+6
*	clk: sunxi-ng: h3: h5: Add minimal rate for video PLL	Jernej Skrabec	2018-03-02	1	-11/+12
*	clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL	Chen-Yu Tsai	2017-10-13	1	-13/+25
*	clk: sunxi-ng: add CLK_SET_RATE_PARENT flag to H3 GPU clock	Icenowy Zheng	2017-09-17	1	-1/+1
*	clk: sunxi-ng: add CLK_SET_RATE_UNGATE to all H3 PLLs	Icenowy Zheng	2017-09-17	1	-9/+9
*	Merge tag 'sunxi-clk-for-4.14-2' of https://git.kernel.org/pub/scm/linux/kern...	Stephen Boyd	2017-08-23	1	-1/+12
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\| *	clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3	Icenowy Zheng	2017-08-04	1	-1/+1
\| *	clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change	Chen-Yu Tsai	2017-08-04	1	-0/+11
* \|	clk: Convert to using %pOF instead of full_name	Rob Herring	2017-07-21	1	-2/+1
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*	clk: sunxi-ng: Support multiple variable pre-dividers	Chen-Yu Tsai	2017-06-07	1	-5/+5
*	clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver	Icenowy Zheng	2017-03-06	1	-7/+320
*	clk: sunxi-ng: fix PLL_CPUX adjusting on H3	Ondrej Jirman	2017-01-02	1	-0/+10
*	clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks	Chen-Yu Tsai	2016-11-11	1	-5/+5
*	Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...	Stephen Boyd	2016-09-14	1	-5/+5
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\| *	clk: sunxi-ng: mux: support fixed pre-dividers on multiple parents	Chen-Yu Tsai	2016-08-25	1	-5/+5
* \|	clk: sunxi-ng: Fix wrong reset register offsets	Jorik Jonker	2016-08-29	1	-8/+8
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*	clk: sunxi-ng: h3: Fix audio clock divider offset	Maxime Ripard	2016-07-11	1	-2/+2
*	clk: sunxi-ng: Add H3 clocks	Maxime Ripard	2016-07-08	1	-0/+826