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path: root/arch/x86/kernel/cpu/amd.c
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* x86: AMD Support for perf_counterJaswinder Singh Rajput2009-02-281-0/+4
* x86, apic: remove duplicate asm/apic.h inclusionsIngo Molnar2009-02-171-2/+0
* x86, apic: remove genapic.hIngo Molnar2009-02-171-1/+1
* x86: remove mach_apic.hIngo Molnar2009-01-291-1/+1
* x86: support always running TSC on Intel CPUsVenki Pallipadi2008-12-161-2/+7
* x86: print out apic id in hex formatYinghai Lu2008-10-161-1/+1
* x86: make amd.c have 64bit support codeYinghai Lu2008-09-081-11/+126
* x86: merge header in amd_64.cYinghai Lu2008-09-081-0/+8
* x86: cpu make amd.c more like amd_64.c v2Yinghai Lu2008-09-081-172/+224
* x86, cpu init: call early_init_xxx in init_xxxYinghai Lu2008-09-061-5/+2
* x86: remove duplicated get_model_name() callingYinghai Lu2008-09-061-3/+0
* x86: remove cpu_vendor_devYinghai Lu2008-09-041-1/+2
* x86: move mtrr cpu cap setting early in early_init_xxxxYinghai Lu2008-09-041-4/+5
* x86: reduce force_mwait visibilityJan Beulich2008-07-181-2/+0
* x86: Move PCI IO ECS code to x86/pciRobert Richter2008-07-081-3/+0
* x86, clockevents: add C1E aware idle functionThomas Gleixner2008-07-081-30/+0
* x86: use cpuinfo to check for interrupt pending message msrThomas Gleixner2008-06-101-26/+15
* x86: cleanup C1E enabled detectionThomas Gleixner2008-06-101-3/+2
* fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Robert Richter2008-06-101-2/+0
* fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Ingo Molnar2008-06-021-0/+1
* x86: add PCI extended config space access for AMD BarcelonaRobert Richter2008-06-021-0/+4
* x86: remove unused function amd_init_cpu()Dmitri Vorobiev2008-04-261-6/+0
* x86: move apic declarations to mach_apic.hGlauber Costa2008-04-171-1/+1
* x86: clean up cpu capabilities accesses, amd.cIngo Molnar2008-04-171-12/+12
* x86: coding style fixes to arch/x86/kernel/cpu/amd.cPaolo Ciarrocchi2008-04-171-46/+48
* x86: use ELF section to list CPU vendor specific codeThomas Petazzoni2008-04-171-1/+4
* x86: fix bootup crash in native_read_tsc()Ingo Molnar2008-02-021-1/+1
* x86: use the correct cpuid method to detect MWAIT support for C statesAndi Kleen2008-01-301-3/+0
* x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detectionAndi Kleen2008-01-301-6/+11
* x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen2008-01-301-0/+3
* spelling fixes: arch/i386/Simon Arlott2007-10-201-1/+1
* x86: print info about late C1E detection on 32bit as wellThomas Gleixner2007-10-171-5/+10
* i386: move kernel/cpuThomas Gleixner2007-10-111-0/+337
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