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* MIPS: Loongson: Naming style cleanup and reworkHuacai Chen2015-06-2127-2828/+0
| | | | | | | | | | | | | | | | | | | | Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Do not register 8250 platform device from module.Ralf Baechle2015-06-101-3/+1
| | | | | | | | | | | | | If CONFIG_SERIAL_8250 is set to m, the Loongson seria.ko module might get unloaded while the serial driver modules are still loaded resulting in stale references to the destroyed platform_device instance. Anyway, platform devices should always be registered indicated what devices are present, _not_ what drivers have been configured. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Patchwork: https://patchwork.linux-mips.org/patch/10538/
* Merge tag 'gpio-v4.1-1' of ↵Linus Torvalds2015-04-182-140/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.1 development cycle: - A new GPIO hogging mechanism has been added. This can be used on boards that want to drive some GPIO line high, low, or set it as input on boot and then never touch it again. For some embedded systems this is bliss and simplifies things to a great extent. - Some API cleanup and closure: gpiod_get_array() and gpiod_put_array() has been added to get and put GPIOs in bulk as was possible with the non-descriptor API. - Encapsulate cross-calls to the pin control subsystem in <linux/gpio/driver.h>. Now this should be the only header any GPIO driver needs to include or something is wrong. Cleanups restricting drivers to this include are welcomed if tested. - Sort the GPIO Kconfig and split it into submenus, as it was becoming and unstructured, illogical and unnavigatable mess. I hope this is easier to follow. Menus that require a certain subsystem like I2C can now be hidden nicely for example, still working on others. - New drivers: - New driver for the Altera Soft GPIO. - The F7188x driver now handles the F71869 and F71869A variants. - The MIPS Loongson driver has been moved to drivers/gpio for consolidation and cleanup. - Cleanups: - The MAX732x is converted to use the GPIOLIB_IRQCHIP infrastructure. - The PCF857x is converted to use the GPIOLIB_IRQCHIP infrastructure. - Radical cleanup of the OMAP driver. - Misc: - Enable the DWAPB GPIO for all architectures. This is a "hard IP" block from Synopsys which has started to turn up in so diverse architectures as X86 Quark, ARC and a slew of ARM systems. So even though it's not an expander, it's generic enough to be available for all. - We add a mock GPIO on Crystalcove PMIC after a long discussion with Daniel Vetter et al, tracing back to the shootout at the kernel summit where DRM drivers and sub-componentization was discussed. In this case a mock GPIO is assumed to be the best compromise gaining some reuse of infrastructure without making DRM drivers overly complex at the same time. Let's see" * tag 'gpio-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (62 commits) Revert "gpio: sch: use uapi/linux/pci_ids.h directly" gpio: dwapb: remove dependencies gpio: dwapb: enable for ARC gpio: removing kfree remove functionality gpio: mvebu: Fix mask/unmask managment per irq chip type gpio: split GPIO drivers in submenus gpio: move MFD GPIO drivers under their own comment gpio: move BCM Kona Kconfig option gpio: arrange SPI Kconfig symbols alphabetically gpio: arrange PCI GPIO controllers alphabetically gpio: arrange I2C Kconfig symbols alphabetically gpio: arrange Kconfig symbols alphabetically gpio: ich: Implement get_direction function gpio: use (!foo) instead of (foo == NULL) gpio: arizona: drop owner assignment from platform_drivers gpio: max7300: remove 'ret' variable gpio: use devm_kzalloc gpio: sch: use uapi/linux/pci_ids.h directly gpio: x-gene: fix devm_ioremap_resource() check gpio: loongson: Add Loongson-3A/3B GPIO driver support ...
| * MIPS: Move Loongson GPIO driver to drivers/gpioHuacai Chen2015-04-072-106/+0
| | | | | | | | | | | | | | | | | | Move Loongson-2's GPIO driver to drivers/gpio and add Kconfig options. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * MIPS: Cleanup Loongson-2F's gpio driverHuacai Chen2015-04-071-57/+23
| | | | | | | | | | | | | | | | | | | | This cleanup is prepare to move the driver to drivers/gpio. Custom definitions of gpio_get_value()/gpio_set_value() are dropped. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | MIPS: Loongson-3: Add chipset ACPI platform driverHuacai Chen2015-04-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver for Loongson-3. This will be used by EC (Embedded Controller, used by laptops) driver and STR (Suspend To RAM). [ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3. Build doesn't like it if no obj-* variable is defined at all in a Makefile. Obviously this has not been tested on other platforms.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9619/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson-3: Add CPU Hwmon platform driverHuacai Chen2015-04-011-0/+9
|/ | | | | | | | | | | | This add CPU Hwmon (temperature sensor) platform driver for Loongson-3. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9617/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-1112-63/+136
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This is an unusually large pull request for MIPS - in parts because lots of patches missed the 3.18 deadline but primarily because some folks opened the flood gates. - Retire the MIPS-specific phys_t with the generic phys_addr_t. - Improvments for the backtrace code used by oprofile. - Better backtraces on SMP systems. - Cleanups for the Octeon platform code. - Cleanups and fixes for the Loongson platform code. - Cleanups and fixes to the firmware library. - Switch ATH79 platform to use the firmware library. - Grand overhault to the SEAD3 and Malta interrupt code. - Move the GIC interrupt code to drivers/irqchip - Lots of GIC cleanups and updates to the GIC code to use modern IRQ infrastructures and features of the kernel. - OF documentation updates for the GIC bindings - Move GIC clocksource driver to drivers/clocksource - Merge GIC clocksource driver with clockevent driver. - Further updates to bring the GIC clocksource driver up to date. - R3000 TLB code cleanups - Improvments to the Loongson 3 platform code. - Convert pr_warning to pr_warn. - Merge a bunch of small lantiq and ralink fixes that have been staged/lingering inside the openwrt tree for a while. - Update archhelp for IP22/IP32 - Fix a number of issues for Loongson 1B. - New clocksource and clockevent driver for Loongson 1B. - Further work on clk handling for Loongson 1B. - Platform work for Broadcom BMIPS. - Error handling cleanups for TurboChannel. - Fixes and optimization to the microMIPS support. - Option to disable the FTLB. - Dump more relevant information on machine check exception - Change binfmt to allow arch to examine PT_*PROC headers - Support for new style FPU register model in O32 - VDSO randomization. - BCM47xx cleanups - BCM47xx reimplement the way the kernel accesses NVRAM information. - Random cleanups - Add support for ATH25 platforms - Remove pointless locking code in some PCI platforms. - Some improvments to EVA support - Minor Alchemy cleanup" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits) MIPS: Add MFHC0 and MTHC0 instructions to uasm. MIPS: Cosmetic cleanups of page table headers. MIPS: Add CP0 macros for extended EntryLo registers MIPS: Remove now unused definition of phys_t. MIPS: Replace use of phys_t with phys_addr_t. MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig. MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO MIPS: <asm/types.h> fix indentation. MAINTAINERS: Add entry for BMIPS multiplatform kernel MIPS: Enable VDSO randomization MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration MIPS: Remove declaration of obsolete arch_init_clk_ops() MIPS: atomic.h: Reformat to fit in 79 columns MIPS: Apply `.insn' to fixup labels throughout MIPS: Fix microMIPS LL/SC immediate offsets MIPS: Kconfig: Only allow 32-bit microMIPS builds MIPS: signal.c: Fix an invalid cast in ISA mode bit handling MIPS: mm: Only build one microassembler that is suitable ...
| * MIPS: loongson: common: rtc: make loongson_rtc_resources staticAaro Koskinen2014-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | Make loongson_rtc_resources static to eliminate the following sparse warning: warning: symbol 'loongson_rtc_resources' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: loongson: common: init: Add a missing includeAaro Koskinen2014-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add a missing include to eliminate the following sparse warnings: warning: symbol 'prom_init' was not declared. Should it be static? warning: symbol 'prom_free_prom_memory' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8531/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: loongson: common: Setup: add a missing includeAaro Koskinen2014-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | Add a missing include to get rid of the following sparse warning: warning: symbol 'plat_mem_setup' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson: cs5536_pci: Add a missing includeAaro Koskinen2014-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add a missing include to get rid of the following sparse warnings: warning: symbol 'cs5536_pci_conf_write4' was not declared. Should it be static? warning: symbol 'cs5536_pci_conf_read4' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8526/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson: common: Fix array initializer syntax.Aaro Koskinen2014-11-243-32/+32
| | | | | | | | | | | | | | | | | | | | Fix array initializer syntax to get rid of the following sparse warnings: "obsolete array initializer, use C99 syntax". Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8525/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson-3: Add RS780/SBX00 HPET supportHuacai Chen2014-11-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPUFreq driver need external timer, so add hpet at first. In Loongson 3, only Core-0 can receive external interrupt. As a result, timekeeping cannot absolutely use HPET timer. We use a hybrid solution: Core-0 use HPET as its clock event device, but other cores still use MIPS; clock source is global and doesn't need interrupt, so use HPET. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8329/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson: Improve LEFI firmware interfaceHuacai Chen2014-11-245-31/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Machtypes of Loongson-3 machines become more and more, but there are only small differences among different machtypes. Keeping a large table of machtypes is very ugly and hard to extend. We found that the major machtype differences are UARTs information (number of UARTs, UART IRQs, UART clocks, etc.), platform devices (EC, temperature sensors, fan controllers, etc.) and some workarounds (because of some CPU bugs or mainboard bugs). In this patch we improve the UEFI-like (LEFI) interface to make all Loongson-3 machines use a same machtype "generic-loongson-machine". Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson: Allow booting from any coreHuacai Chen2014-11-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By offering Logical->Physical core id mapping, so as to reserve some physical cores via mask. This allow booting from any core when core-0 has problems. Since the maximun cores supported by Loongson-3 is 16, 32-bit cpu_startup_core_id can be split to 16-bit cpu_startup_core_id and 16-bit reserved_cores_mask for compatibility. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson-3: Add PHYS48_TO_HT40 supportHuacai Chen2014-11-241-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The width of HT-bus is only 40-bit, but Loongson-3 has 48-bit physical address. This implies only node-0's memory is DMAable because high bits (Node ID) will lost. Fortunately, by configuring address windows in firmware, we can extract 2bit Node ID (bit 44~47, only bit 44~45 used now) from Loongson-3's 48-bit address space and embed it into 40-bit (bit 37~38). Every NUMA node can do DMA now (however, maximum memory of each node is reduced to 2^37 = 128GB). Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Remove useless parenthesesRalf Baechle2014-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the spatch @@ expression e; @@ - return (e); + return e; with heavy hand editing because some of the changes are either whitespace or identation only or result in excessivly long lines. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson: Make platform serial setup always built-in.Aaro Koskinen2014-11-241-1/+2
|/ | | | | | | | | | | | | | | | | | If SERIAL_8250 is compiled as a module, the platform specific setup for Loongson will be a module too, and it will not work very well. At least on Loongson 3 it will trigger a build failure, since loongson_sysconf is not exported to modules. Fix by making the platform specific serial code always built-in. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Reported-by: Ralf Baechle <ralf@linux-mips.org> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Markos Chandras <Markos.Chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/8533/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add Loongson-3B supportHuacai Chen2014-07-301-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson-3B is a 8-cores processor. In general it looks like there are two Loongson-3A integrated in one chip: 8 cores are separated into two groups (two NUMA node), each node has its own local memory. Of course there are some differences between one Loongson-3B and two Loongson-3A. E.g., the base addresses of IPI registers of each node are not the same; Loongson-3A use ChipConfig register to enable/disable clock, but Loongson-3B use FreqControl register instead. There are two revision of Loongson-3B, the first revision is called as Loongson-3B1000, whose frequency is 1GHz and has a PRid 0x6306, the second revision is called as Loongson-3B1500, whose frequency is 1.5GHz and has a PRid 0x6307. Both revisions has a bug that clock cannot be disabled at runtime, but this will be fixed in future. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7188/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add NUMA support for Loongson-3Huacai Chen2014-07-302-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Multiple Loongson-3A chips can be interconnected with HT0-bus. This is a CC-NUMA system that every chip (node) has its own local memory and cache coherency is maintained by hardware. The 64-bit physical memory address format is as follows: 0x-0000-YZZZ-ZZZZ-ZZZZ The high 16 bits should be 0, which means the real physical address supported by Loongson-3 is 48-bit. The "Y" bits is the base address of each node, which can be also considered as the node-id. The "Z" bits is the address offset within a node, which means every node has a 44 bits address space. Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally, because many other MIPS CPUs have also extended their address spaces. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7187/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Modify ChipConfig register definitionHuacai Chen2014-07-302-4/+15
| | | | | | | | | | | | | | | This patch is prepared for Multi-chip interconnection. Since each chip has a ChipConfig register, LOONGSON_CHIPCFG should be an array. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Lemote 2F: cs5536: mfgpt: use raw locksSebastian Andrzej Siewior2014-05-281-6/+5
| | | | | | | | | | | | | | | | | The lock is taken in the raw irq path and therefore a rawlock should be used instead of a normal spinlock. While here I drop the export symbol on that variable since there are no other users. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Hua Yan <yanh@lemote.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Hongliang Tao <taohl@lemote.com> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6936/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add Loongson-3 SMP supportHuacai Chen2014-03-312-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPI registers of Loongson-3 include IPI_SET, IPI_CLEAR, IPI_STATUS, IPI_EN and IPI_MAILBOX_BUF. Each bit of IPI_STATUS indicate a type of IPI and IPI_EN indicate whether the IPI is enabled. The sender write 1 to IPI_SET bits generate IPIs in IPI_STATUS, and receiver write 1 to bits of IPI_CLEAR to clear IPIs. IPI_MAILBOX_BUF are used to deliver more information about IPIs. Why we change code in arch/mips/loongson/common/setup.c? If without this change, when SMP configured, system cannot boot since it hang at printk() in cgroup_init_early(). The root cause is: console_trylock() \-->down_trylock(&console_sem) \-->raw_spin_unlock_irqrestore(&sem->lock, flags) \-->_raw_spin_unlock_irqrestore()(SMP/UP have different versions) \-->__raw_spin_unlock_irqrestore() (following is the SMP case) \-->do_raw_spin_unlock() \-->arch_spin_unlock() \-->nudge_writes() \-->mb() \-->wbflush() \-->__wbflush() In previous code __wbflush() is initialized in plat_mem_setup(), but cgroup_init_early() is called before plat_mem_setup(). Therefore, In this patch we make changes to avoid boot failure. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6638 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add swiotlb to support All-Memory DMAHuacai Chen2014-03-312-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson doesn't support DMA address above 4GB traditionally. If memory is more than 4GB, CONFIG_SWIOTLB and ZONE_DMA32 should be selected. In this way, DMA pages are allocated below 4GB preferably. However, if low memory is not enough, high pages are allocated and swiotlb is used for bouncing. Moreover, we provide a platform-specific dma_map_ops::set_dma_mask() to set a device's dma_mask and coherent_dma_mask. We use these masks to distinguishes an allocated page can be used for DMA directly, or need swiotlb to bounce. Recently, we found that 32-bit DMA isn't a hardware bug, but a hardware configuration issue. So, latest firmware has enable the DMA support as high as 40-bit. To support all-memory DMA for all devices (besides the Loongson platform limit, there are still some devices have their own DMA32 limit), and also to be compatible with old firmware, we keep use swiotlb. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6636 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add serial port supportHuacai Chen2014-03-312-12/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson family machines has three types of serial port: PCI UART, LPC UART and CPU internal UART. Loongson-2E and parts of Loongson-2F based machines use PCI UART; most Loongson-2F based machines use LPC UART; Loongson-2G/3A has both LPC and CPU UART but usually use CPU UART. Port address of UARTs: CPU UART: REG_BASE + OFFSET; LPC UART: LIO1_BASE + OFFSET; PCI UART: PCIIO_BASE + OFFSET. Since LPC UART are linked in "Local Bus", both CPU UART and LPC UART are called "CPU provided serial port". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6635 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Add UEFI-like firmware interface (LEFI) supportHuacai Chen2014-03-315-18/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new UEFI-like firmware interface (LEFI, i.e. Loongson Unified Firmware Interface) has 3 advantages: 1, Firmware export a physical memory map which is similar to X86's E820 map, so prom_init_memory() will be more elegant that #ifdef clauses can be removed. 2, Firmware export a pci irq routing table, we no longer need pci irq routing fixup in kernel's code. 3, Firmware has a built-in vga bios, and its address is exported, the linux kernel no longer need an embedded blob. With the LEFI interface, Loongson-3A/2G and all their successors can use a unified kernel. All Loongson-based machines support this new interface except 2E/2F series. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6632 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 3: Add Lemote-3A machtypes definitionHuacai Chen2014-03-311-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add four Loongson-3 based machine types: MACH_LEMOTE_A1004/MACH_LEMOTE_A1201 are laptops; MACH_LEMOTE_A1101 is mini-itx; MACH_LEMOTE_A1205 is all-in-one machine. The most significant differrent between A1004/A1201 and A1101/A1205 is the laptops have EC but others don't. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongliang Tao <taohl@lemote.com> Signed-off-by: Hua Yan <yanh@lemote.com> Tested-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Alex Smith <alex.smith@imgtec.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/6631 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Hide the pci code behind CONFIG_PCIMarkos Chandras2013-09-031-1/+2
| | | | | | | | | | | | | | | | | | The pci.c code depends on symbols which are only visible if CONFIG_PCI is selected. Also fixes the following problem on loongson allnoconfig: arch/mips/built-in.o: In function `pcibios_init': pci.c:(.init.text+0x528): undefined reference to `register_pci_controller' arch/mips/built-in.o:(.data+0xc): undefined reference to `loongson_pci_ops' Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5584/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Fix random early boot hangAaro Koskinen2013-06-211-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Loongson boards (e.g. Lemote FuLoong mini-PC) use ISA/southbridge device (CS5536 general purpose timer) for the timer interrupt. It starts running early and is already enabled during the PCI configuration, during which there is a small window in pci_read_base() when the register access is temporarily disabled. If the timer interrupts at this point, the system will hang. Fix this by adding a fixup that keeps the register access always enabled. The hang the patch fixes usually looks like this: [ 0.844000] pci 0000:00:0e.0: [1022:2090] type 00 class 0x060100 [ 0.848000] pci 0000:00:0e.0: reg 10: [io 0xb410-0xb417] [ 0.852000] pci 0000:00:0e.0: reg 14: [io 0xb000-0xb0ff] [ 0.856000] pci 0000:00:0e.0: reg 18: [io 0xb380-0xb3bf] [ 28.140000] BUG: soft lockup - CPU#0 stuck for 23s! [swapper:1] [ 28.140000] Modules linked in: [ 28.140000] irq event stamp: 37965 [ 28.140000] hardirqs last enabled at (37964): [<ffffffff80204c0c>] restore_partial+0x6c/0x13c [ 28.140000] hardirqs last disabled at (37965): [<ffffffff80204f8c>] handle_int+0x144/0x15c [ 28.140000] softirqs last enabled at (24316): [<ffffffff802381f4>] __do_softirq+0x1cc/0x258 [ 28.140000] softirqs last disabled at (24327): [<ffffffff80238420>] do_softirq+0xc8/0xd0 [ 28.140000] Cpu 0 [ 28.140000] $ 0 : 0000000000000000 00000000140044e1 980000009f090000 0000000000000001 [ 28.140000] $ 4 : 980000009f090000 0000000000000000 0000000000000100 03b7fff87fbde011 [ 28.140000] $ 8 : ffffffff812b1928 000000000001e000 043ffff87fbde011 fffffff87fbde011 [ 28.140000] $12 : 000000000000000e ffffffff807a0000 0000000000000698 0000000000000000 [ 28.140000] $16 : 0000000000000002 ffffffff81055e20 ffffffff80786810 0000000000000000 [ 28.140000] $20 : 000000000000000a ffffffff807bc244 ffffffff807e6350 ffffffff80770000 [ 28.140000] $24 : 0000000000000d80 00000000fffedbe0 [ 28.140000] $28 : 980000009f07c000 980000009f07fa10 ffffffff81050000 ffffffff802380f8 [ 28.140000] Hi : 0000000000d0fc00 [ 28.140000] Lo : 0000000000f82b40 [ 28.140000] epc : ffffffff8023810c __do_softirq+0xe4/0x258 [ 28.140000] Not tainted [ 28.140000] ra : ffffffff802380f8 __do_softirq+0xd0/0x258 [ 28.140000] Status: 140044e3 KX SX UX KERNEL EXL IE [ 28.140000] Cause : 10008400 [ 28.140000] PrId : 00006303 (ICT Loongson-2) Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4958/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Idle: Consolidate all declarations in <asm/idle.h>.Ralf Baechle2013-05-221-0/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: loongson: use GPIO driver on CONFIG_GPIOLIBAlexandre Courbot2013-03-201-1/+1
| | | | | | | | | The GPIO driver uses gpiolib, thus it should be compiled when CONFIG_GPIOLIB is defined and not only CONFIG_GENERIC_GPIO. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-0123-91/+91
| | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: fix implicit smp.h usage in various files.Paul Gortmaker2011-10-311-0/+1
| | | | | | | | | | | | | We need to call out inclusion of smp.h, or with the module.h cleanup we'll get things like: arch/mips/loongson/common/platform.c:21: error: implicit declaration of function 'smp_processor_id' arch/mips/vr41xx/common/giu.c:84: error: implicit declaration of function 'smp_processor_id' arch/mips/vr41xx/common/rtc.c:85: error: implicit declaration of function 'smp_processor_id' Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds2011-05-191-4/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: convert mips to generic i8253 clocksource clocksource: convert x86 to generic i8253 clocksource clocksource: convert footbridge to generic i8253 clocksource clocksource: add common i8253 PIT clocksource blackfin: convert to clocksource_register_hz mips: convert to clocksource_register_hz/khz sparc: convert to clocksource_register_hz/khz alpha: convert to clocksource_register_hz microblaze: convert to clocksource_register_hz/khz ia64: convert to clocksource_register_hz/khz x86: Convert remaining x86 clocksources to clocksource_register_hz/khz Make clocksource name const
| * Merge branch 'consolidate-clksrc-i8253' of ↵Thomas Gleixner2011-05-143-16/+11
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | mips: convert to clocksource_register_hz/khzJohn Stultz2011-02-211-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
* | | MIPS: Loongson: Fix GCC 2.6.0 build error.Ralf Baechle2011-05-101-2/+3
| |/ |/| | | | | | | | | | | | | | | | | | | | | CC arch/mips/loongson/common/env.o arch/mips/loongson/common/env.c: In function 'prom_init_env': arch/mips/loongson/common/env.c:50:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:51:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:52:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] arch/mips/loongson/common/env.c:53:12: error: variable 'ret' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Convert the irq functions to the new namesThomas Gleixner2011-03-291-1/+2
| | | | | | | | | | | | Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | MIPS: Loongson: Convert to new irq_chip functionsThomas Gleixner2011-03-251-9/+7
| | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2196/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson: Fix potentially wrong string handlingStefan Weil2011-03-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This error was reported by cppcheck: arch/mips/loongson/common/machtype.c:56: error: Dangerous usage of 'str' (strncpy doesn't always 0-terminate it) If strncpy copied MACHTYPE_LEN bytes, the destination string str was not terminated. The patch adds one more byte to str and makes sure that this byte is always 0. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Arnaud Patard <apatard@mandriva.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2053/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson: Remove ad-hoc cmdline defaultRobert Millan2011-03-141-5/+0
|/ | | | | | | | | | | | | | | Loongson builds have an ad-hoc cmdline default of "console=ttyS0,115200 root=/dev/hda1". These settings come from a vendor; I remember builds from Lemote branch requiring a "console=tty" override in order to get a working console. At least on Yeeloong, they're particularly useless: there's no external serial port, and the IDE drive is now recognised as /dev/sda. Signed-off-by: Robert Millan <rmh@gnu.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1759/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'master' into for-nextJiri Kosina2010-12-221-2/+2
|\ | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * MIPS: Loongson: Add return value check for strict_strtoul()Wu Zhangjin2010-12-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cc1: warnings being treated as errors arch/mips/loongson/common/env.c: In function 'prom_init_env': arch/mips/loongson/common/env.c:49: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:50: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:51: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result arch/mips/loongson/common/env.c:52: error: ignoring return value of 'strict_strtol', declared with attribute warn_unused_result Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1762/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | suspend: constify platform_suspend_opsLionel Debroux2010-11-161-1/+1
|/ | | | | | | | | | | | | | While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849e90a41ea2109bd0e2f7c7164b0c4ce73). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: Lionel Debroux <lionel_debroux@yahoo.fr> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* MIPS: Loongson: Remove set_irq_trigger_mode()Wu Zhangjin2010-08-051-3/+0
| | | | | | | | | | | | | set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: irq.c: Misc cleanupsShinya Kuribayashi2010-08-051-7/+4
| | | | | | | | | | | | | * Remove unnecessary 'if (int_status & (1 <<10))' statement * s/if (foo != 0)/if (foo)/ * Remove unused 'inst_status &= ~(1 << i);' line Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: wuzhangjin@gmail.com CC: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1433/ Acked-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Migrate makefile to new Platform fileWu Zhangjin2010-08-051-2/+0
| | | | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> To: linux-mips <linux-mips@linux-mips.org> Cc: Alexander Clouter <alex@digriz.org.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org>, Patchwork: https://patchwork.linux-mips.org/patch/1313/ Patchwork: https://patchwork.linux-mips.org/patch/1326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Define rtc device on MC146818-equipped systemsArnaud Patard2010-07-052-0/+44
| | | | | | | | | | | | This patch declare the rtc device present on systems with clock compatible with the mc146818 and handled by rtc-cmos. Introduce a new Kconfig entry because there are some systems without rtc_cmos compatible clock. Signed-off-by: Arnaud Patard <apatard@mandriva.com> To: linux-mips@linux-mips.org Cc: aba@not.so.argh.org Patchwork: http://patchwork.linux-mips.org/patch/1320/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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