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path: root/arch/mips/include/asm/mipsregs.h
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* MIPS: math-emu: Define IEEE 754-2008 feature control bitsMaciej W. Rozycki2015-04-081-2/+7
* MIPS: math-emu: Implement the FCCR, FEXR and FENR registersMaciej W. Rozycki2015-04-081-12/+57
* MIPS: mipsregs.h: Reindent CP0 Cause macrosMaciej W. Rozycki2015-04-081-16/+16
* MIPS: mipsregs.h: Move TX39 macros out of the wayMaciej W. Rozycki2015-04-081-33/+33
* MIPS: mipsregs.h: Reorder CP1 macro definitionsMaciej W. Rozycki2015-04-081-72/+75
* MIPS: mipsregs.h: Remove broken commentsMaciej W. Rozycki2015-04-081-6/+0
* MIPS: Add architectural FDC IRQ fieldsJames Hogan2015-03-311-0/+4
* MIPS: Add arch CDMM definitions and probingJames Hogan2015-03-311-0/+11
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-211-0/+4
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| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-0/+1
| * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-171-0/+2
| * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-171-0/+1
* | MIPS: mipsregs.h: Add write_32bit_cp1_register()James Hogan2015-01-301-0/+15
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* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-12-111-0/+43
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| * MIPS: Add CP0 macros for extended EntryLo registersSteven J. Hill2014-11-241-0/+40
| * MIPS: define bits introduced for hybrid FPRsPaul Burton2014-11-241-0/+3
* | MIPS: cpu-probe: Set the FTLB probability bit on supported coresMarkos Chandras2014-11-241-0/+2
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* MIPS: Fix build with binutils 2.24.51+Manuel Lauss2014-11-071-1/+10
* MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFTDan Carpenter2014-08-021-1/+0
* MIPS: define MAAR register accessors & bitsPaul Burton2014-08-021-0/+12
* MIPS: kernel: cpu-probe: Detect unique RI/XI exceptionsLeonid Yegoshin2014-08-021-0/+1
* MIPS: asm: Add register definitions for Hardware Table WalkerMarkos Chandras2014-08-021-0/+44
* MIPS: Add function get_ebase_cpunumDavid Daney2014-05-301-0/+9
* MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-132/+1
* MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs.Ralf Baechle2014-05-231-1/+8
* MIPS: Add MSA register definitions & accessPaul Burton2014-03-261-0/+1
* MIPS: Add CP0 CMGCRBase definitions & accessorPaul Burton2014-03-061-0/+6
* MIPS: Define Config1 cache field shifts & sizesPaul Burton2014-03-061-0/+12
* MIPS: mm: c-r4k: Detect instruction cache aliasesMarkos Chandras2014-03-061-0/+3
* MIPS: include linux/types.hQais Yousef2014-01-231-0/+1
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-221-0/+2
* MIPS: Add function for flushing the TLB using the TLBINV instructionLeonid Yegoshin2014-01-221-0/+13
* MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill2014-01-221-0/+29
* MIPS: Add missing bits for Config registersLeonid Yegoshin2014-01-221-2/+38
* MIPS: Add MIPS R5 config5 register.Ralf Baechle2013-09-191-0/+7
* MIPS: microMIPS: Fix improper definition of ISA exception bit.Steven J. Hill2013-07-011-1/+1
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-091-0/+1
* MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-011-0/+18
* MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-191-19/+190
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-186/+125
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| * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-191-0/+1
| * MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-171-201/+30
| * MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-171-0/+89
| * MIPS: dsp: Add assembler support for DSP ASEs.Steven J. Hill2013-02-171-17/+36
| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-171-0/+1
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-199/+199
* | MIPS: Whitespace cleanups and reformatting.Steven J. Hill2013-02-011-11/+15
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* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-8/+0
* MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORTDavid Daney2012-12-121-1/+1
* MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-111-0/+1
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