summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/cpu-info.h
Commit message (Expand)AuthorAgeFilesLines
* MIPS: Expand MIPS32 ASIDs to 64 bitsPaul Burton2018-12-051-1/+1
* MIPS: Add CPU cluster number accessorsPaul Burton2017-08-301-0/+11
* MIPS: Unify checks for sibling CPUsPaul Burton2017-08-301-0/+17
* MIPS: Store core & VP IDs in GlobalNumber-style variablePaul Burton2017-08-301-26/+13
* MIPS: Abstract CPU core & VP(E) ID access through accessor functionsPaul Burton2017-08-301-3/+24
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2017-05-121-2/+1
|\
| * MIPS: Delete redundant definition of SMP_CACHE_BYTES.Ralf Baechle2017-04-101-2/+1
* | KVM: MIPS: Implement VZ supportJames Hogan2017-03-281-0/+1
* | KVM: MIPS/TLB: Add VZ TLB managementJames Hogan2017-03-281-0/+1
|/
* MIPS: Add probing & defs for VZ & guest featuresJames Hogan2016-05-131-0/+14
* MIPS: Support extended ASIDsPaul Burton2016-05-131-0/+14
* MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mipsPaul Burton2016-05-131-0/+10
* MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen2016-05-131-0/+1
* MIPS: smp-cps: Support MIPSr6 Virtual ProcessorsPaul Burton2016-05-131-2/+2
* MIPS: cpu_name_string: Use raw_smp_processor_id().James Hogan2016-03-291-1/+1
* MIPS: Respect the ISA level in FCSR handlingMaciej W. Rozycki2015-04-081-0/+2
* MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}Markos Chandras2015-02-161-0/+5
* MIPS: cpu-probe: Set the write-combine CCA value on per core basisMarkos Chandras2014-09-221-0/+5
* MIPS: cpu-info: Change the cpu options variable to unsigned long longMarkos Chandras2014-08-021-1/+1
* MIPS: Support CPU topology files in sysfsHuacai Chen2014-07-301-0/+1
* MIPS: Fix potential build failures using cpu_vpe_id on non-MTPaul Burton2014-07-301-1/+1
* Merge branch '3.15-fixes' into mips-for-linux-nextRalf Baechle2014-06-041-2/+2
|\
| * MIPS: Change type of asid_cache to unsigned longRalf Baechle2014-05-211-2/+2
* | MIPS: MT: Remove SMTC supportRalf Baechle2014-05-241-9/+4
|/
* MIPS: MT: proc: Add support for printing VPE and TC idsRalf Baechle2014-03-311-0/+21
* MIPS: Detect the MSA ASEPaul Burton2014-03-261-0/+1
* MIPS: Add cpu_vpe_id macroPaul Burton2014-03-261-0/+6
* MIPS: Add support for FTLBsLeonid Yegoshin2014-01-221-0/+3
* MIPS: Provide nice way to access boot CPU's data.Ralf Baechle2013-09-171-0/+1
* MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-9/+9
* MIPS: Probe for presence of KScratch registers.David Daney2011-01-181-0/+1
* MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck2010-02-021-0/+3
* MIPS: Outline udelay and fix a few issues.Ralf Baechle2009-06-081-2/+2
* MIPS: Add HARDWARE_WATCHPOINTS definitions and support code.David Daney2008-10-111-0/+6
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+84
OpenPOWER on IntegriCloud