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* Limit BMC SPI Flash speed to 25MHz on Talos II systemsdev-5.0-raptor-04-16-2019Raptor Engineering Development Team2019-04-271-1/+1
| | | | | | | We have been receiving sporadic reports of BMC corruption and failure to boot requiring external recovery. The main suspect is the Flash write speed; reduce it by 1/2 to stabilize writes from the BMC to its main Flash storage device.
* Update Talos dts for latest kernelRaptor Engineering Development Team2019-04-231-7/+68
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* Add CPU SEEPROMs to Talos device tree Enable I2C bus 0 (CPU 0 SEEPROMs) in ↵Raptor Engineering Development Team2019-04-191-2/+52
| | | | Talos device tree
* Lower clock frequency of FPGA I2C bus to mitigate read / write errorsRaptor Engineering Development Team2019-04-191-0/+1
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* Update MAX31785 setings on Talos systemsRaptor Engineering Development Team2019-04-191-6/+12
| | | | | Enable faster fan ramp up/down to avoid overshoot / fan speed oscillations Disable unnecessary temperature sensor watchdog
* Remove explicit chassis reset binding on Talos systemsRaptor Engineering Development Team2019-04-191-6/+0
| | | | This allows the reset button service to bind to the GPIO
* Remove DD1 VCS workaround GPIO hogRaptor Engineering Development Team2019-04-191-6/+0
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* Move the system speaker from PWM7 to GPION7 for software-mode beep ↵Raptor Engineering Development Team2019-04-191-7/+5
| | | | development The ASpeed device doesn't really support variable PWM frequencies, at least not enough for proper beep support
* Port commit e3fac12aa8172222281420bf2eb1b25b756e82c8 to TalosRaptor Engineering Development Team2019-04-191-1/+4
| | | | ARM: dts: aspeed: talos: Add w83773g temp sensor
* Port commit 052add4e0fd8d827b85382f584e53582ce621951 to TalosRaptor Engineering Development Team2019-04-191-0/+6
| | | | ARM: dts: aspeed: talos: hog GPIOS7
* Add chassis reset request input to BMC DTS for TalosRaptor Engineering Development Team2019-04-191-0/+6
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* Add BMC ready LED output to Talos BMC device treeRaptor Engineering Development Team2019-04-191-0/+4
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* Put Talos system fans into PWM mode by defaultRaptor Engineering Development Team2019-04-191-6/+6
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* Update Talos device tree to match production hardwareRaptor Engineering Development Team2019-04-191-28/+5
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* Put fans in RPM mode at startup on Talos systemsRaptor Engineering Development Team2019-04-191-0/+6
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* Enable PWM7 for use with on-board piezo speakerRaptor Engineering Development Team2019-04-191-1/+1
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* Enable MAX31785 fan controllerRaptor Engineering Development Team2019-04-191-2/+87
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* Add Raptor Computing Systems Talos BMC setup and device tree filesRaptor Engineering Development Team2019-04-192-0/+302
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* ARM: dts: aspeed: zaius: Fix intersil compatiblesPatrick Venture2019-04-191-8/+8
| | | | | | | | | s/intersil/isil/g per prefix in vendor prefixes file. OpenBMC-Staging-Count: 1 Signed-off-by: Patrick Venture <venture@google.com> [AJ: Rework subject] Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: aspeed: zaius: add Infineon and Intersil regulatorsMaxim Sloyko2019-04-181-5/+60
| | | | | | | | | | Add the nodes for the ir38064 and isl68137 devices on the Zaius board. OpenBMC-Staging-Count: 1 Signed-off-by: Maxim Sloyko <maxims@google.com> Signed-off-by: Robert Lippert <rlippert@google.com> Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
* ARM: dts: npcm7xx: Add PECI descriptionTomer Maimon2019-04-112-0/+22
| | | | | | OpenBMC-Staging-Count: 1 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* Merge tag 'v5.0.7' into dev-5.0Joel Stanley2019-04-082-12/+12
|\ | | | | | | | | | | This is the 5.0.7 stable release Signed-off-by: Joel Stanley <joel@jms.id.au>
| * ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notationMathieu Malaterre2019-04-051-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ Upstream commit 3e3380d0675d5e20b0af067d60cb947a4348bf9b ] Improve the DTS files by removing all the leading "0x" and zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading "0x" and Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} + For simplicity, two sed expressions were used to solve each warnings separately. To make the regex expression more robust a few other issues were resolved, namely setting unit-address to lower case, and adding a whitespace before the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions This will solve as a side effect warning: Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>" This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation") Reported-by: David Daney <ddaney@caviumnetworks.com> Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Mathieu Malaterre <malat@debian.org> [vzapolskiy: fixed commit message to pass checkpatch.pl test] Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
| * ARM: dts: meson8b: fix the Ethernet data line signals in eth_rgmii_pinsMartin Blumenstingl2019-04-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ Upstream commit 29f0023d01f063feacfc404f0446905aee4f82ee ] According to the Odroid-C1+ schematics the Ethernet TXD1 signal is routed to GPIOH_5 and the TXD0 signal is routed to GPIOH_6. The public S805 datasheet shows that TXD0 can be routed to DIF_2_P and TXD1 can be routed to DIF_2_N instead. The pin groups eth_txd0_0 (GPIOH_6) and eth_txd0_1 (DIF_2_P) are both configured as Ethernet TXD0 and TXD1 data lines in meson8b.dtsi. At the same time eth_txd1_0 (GPIOH_5) and eth_txd1_1 (DIF_2_N) are configured as TXD0 and TXD1 data lines as well. This results in a bad Ethernet receive performance. Presumably this is due to the eth_txd0 and eth_txd1 signal being routed to the wrong pins. As a result of that data can only be transmitted on eth_txd2 and eth_txd3. However, I have no scope to fully confirm this assumption. The vendor u-boot sources for Odroid-C1 use the following Ethernet pinmux configuration: SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_6, 0x3f4f); SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_7, 0xf00000); This translates to the following pin groups in the mainline kernel: - register 6 bit 0: eth_rxd1 (DIF_0_P) - register 6 bit 1: eth_rxd0 (DIF_0_N) - register 6 bit 2: eth_rx_dv (DIF_1_P) - register 6 bit 3: eth_rx_clk (DIF_1_N) - register 6 bit 6: eth_tx_en (DIF_3_P) - register 6 bit 8: eth_ref_clk (DIF_3_N) - register 6 bit 9: eth_mdc (DIF_4_P) - register 6 bit 10: eth_mdio_en (DIF_4_N) - register 6 bit 11: eth_tx_clk (GPIOH_9) - register 6 bit 12: eth_txd2 (GPIOH_8) - register 6 bit 13: eth_txd3 (GPIOH_7) - register 7 bit 20: eth_txd0_0 (GPIOH_6) - register 7 bit 21: eth_txd1_0 (GPIOH_5) - register 7 bit 22: eth_rxd3 (DIF_2_P) - register 7 bit 23: eth_rxd2 (DIF_2_N) Drop the eth_txd0_1 and eth_txd1_1 groups from eth_rgmii_pins to fix the Ethernet transmit performance on Odroid-C1. Also add the eth_rxd2 and eth_rxd3 groups so we don't rely on the bootloader to set them up. iperf3 statistics before this change: - transmitting from Odroid-C1: 741 Mbits/sec (0 retries) - receiving on Odroid-C1: 199 Mbits/sec (1713 retries) iperf3 statistics after this change: - transmitting from Odroid-C1: 667 Mbits/sec (0 retries) - receiving on Odroid-C1: 750 Mbits/sec (0 retries) Fixes: b96446541d8390 ("ARM: dts: meson8b: extend ethernet controller description") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: Emiliano Ingrassia <ingrassia@epigenesys.com> Cc: Linus Lüssing <linus.luessing@c0d3.blue> Tested-by: Emiliano Ingrassia <ingrassia@epigenesys.com> Reviewed-by: Emiliano Ingrassia <ingrassia@epigenesys.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
* | ARM: dts: Aspeed: Witherspoon: Update BMC partitioningEdward A. James2019-04-041-2/+35
| | | | | | | | | | | | | | | | | | | | | | | | Add simplified partitions for BMC and alternate flash. Include these by default in Witherspoon. OpenBMC-Staging-Count: 1 Signed-off-by: Edward A. James <eajames@us.ibm.com> Signed-off-by: Adriana Kobylak <anoo@us.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: romulus: Enable video engineEddie James2019-04-041-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the video engine and add it's optional reserved memory region. Use 32MB for the reserved memory since the video engine could need up to two 1920x1200@32bpp source buffers. Source buffers: 2 * 1920 * 1200 * 4 = 18432000 bytes In addition, the V4L2 subsystem will allocate any number of compression buffers, each at most 1/8th the size of the source buffer. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: witherspoon: Enable video engineEddie James2019-04-041-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the video engine and add it's optional reserved memory region. Use 32MB for the reserved memory since the video engine could need up to two 1920x1200@32bpp source buffers. Source buffers: 2 * 1920 * 1200 * 4 = 18432000 bytes In addition, the V4L2 subsystem will allocate any number of compression buffers, each at most 1/8th the size of the source buffer. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g5: Add video engineEddie James2019-04-041-0/+10
| | | | | | | | | | | | | | | | Add a node to describe the video engine on the AST2500. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: witherspoon: Enable vhubEddie James2019-03-271-0/+4
| | | | | | | | | | | | | | | | Enable the virtual USB hub. OpenBMC-Staging-Count: 1 Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add Power9 and Power9 CFAM descriptionBenjamin Herrenschmidt2019-03-206-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | To be used by the OpenPower BMC machines. This provides proper chip IDs but also adds the various sub-devices necessary for the future OCC driver among other. All the added nodes comply with the existing upstream FSI bindings. OpenBMC-Staging-Count: 1 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Rename flash-controller nodesJoel Stanley2019-03-202-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | The device tree compiler has started spitting out warnings about these names, insisting they be called 'spi': ../arch/arm/boot/dts/aspeed-g5.dtsi:108.35-128.5: Warning (spi_bus_bridge): /ahb/flash-controller@1e631000: node name for SPI buses should be 'spi' OpenBMC-Staging-Count: 1 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: palmetto: Fix flash_memory regionLei YU2019-03-201-2/+2
| | | | | | | | | | | | | | | | | | | | The flash_memory region was incorrect and exceeds AST2400's RAM range. Fix it by putting it before coldfire region, and aligned with 32MiB. Signed-off-by: Lei YU <mine260309@gmail.com> Acked-by: Andrew Jeffery <andrew@aj.id.au> OpenBMC-Staging-Count: 2 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: tiogapass: Add sensorsVijay Khemka2019-03-201-2/+21
| | | | | | | | | | | | | | | | | | Added ADC and other sensor devices present in the Facebook Tiogapass machine. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: tiogapass: Enable KCSVijay Khemka2019-03-201-0/+12
| | | | | | | | | | | | | | | | Tiogapass uses two KCS channels. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add KCS support for LPC BMCVijay Khemka2019-03-201-1/+32
| | | | | | | | | | | | | | | | | | | | This adds the description of the four Keyboard Controller Style (KCS) IPMI communication channels present in the ASPEED BMC. They are disabled by default. OpenBMC-Staging-Count: 2 Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add #interrupt-cells property to gpio controllersMark Walton2019-03-202-0/+2
| | | | | | | | | | | | | | | | | | | | | | Allows the GPIO controller to be used as an interrupt parent. of_irq_find_parent() skips interrupt controller nodes that do not have the #interrupt-cells property. OpenBMC-Staging-Count: 2 Signed-off-by: Mark Walton <mark.walton@serialtek.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: peci: Add PECI nodeJae Hyun Yoo2019-03-202-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds PECI bus/adapter node of AST24xx/AST25xx into aspeed-g4 and aspeed-g5. OpenBMC-Staging-Count: 2 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add RTC nodeJoel Stanley2019-03-202-0/+12
| | | | | | | | | | | | | | The ASPEED ast2400 and ast2500 both contain a RTC device. OpenBMC-Staging-Count: 3 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add "spi-max-frequency" propertyCédric Le Goater2019-03-207-0/+20
| | | | | | | | | | | | | | | | | | | | Keep the FMC controller chips at a safe 50 MHz rate and use 100 MHz for the PNOR on the machines using a AST2500 SoC. OpenBMC-Staging-Count: 5 Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Enable the GFX IPJoel Stanley2019-03-203-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The GFX controller is the internal graphics device used by the SoC (opposed to the one connected via the PCIe device and used by the host). This configures it with a framebuffer region and adds it to the command line so kernel boot messages appear on the display. Enabled for Romulus, Witherspoon, and the ASPEED AST2500 EVB. OpenBMC-Staging-Count: 5 Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g5: Add resets and clocks to GFX nodeJoel Stanley2019-03-201-0/+4
| | | | | | | | | | | | | | | | | | | | The ast2500 has a reset for the CRT device that must be deasserted before it can be used. Similarly it has a clock gate for a clock called D1CLK that must be set to running. OpenBMC-Staging-Count: 5 Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g4: Expose SuperIO scratch registersJoel Stanley2019-03-201-0/+87
| | | | | | | | | | | | OpenBMC-Staging-Count: 4 Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registersAndrew Jeffery2019-03-201-0/+139
| | | | | | | | | | | | OpenBMC-Staging-Count: 5 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Enable mboxJoel Stanley2019-03-205-0/+19
| | | | | | | | | | OpenBMC-Staging-Count: 6 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: Add LPC mailbox nodeJoel Stanley2019-03-202-0/+14
| | | | | | | | | | OpenBMC-Staging-Count: 6 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed: witherspoon: Update max31785 nodeAndrew Jeffery2019-03-201-0/+52
| | | | | | | | | | | | | | | | | | | | Witherspoon contains four dual-tach fans. We configure them go to 100% when the fault pin is asserted, and disable the fan ramp watchdog. This preserves the behaviour of the previous driver. OpenBMC-Staging-Count: 6 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-ast2500: Update flash layoutJoel Stanley2019-03-201-0/+1
| | | | | | | | | | | | | | Move to the openbmc-flash-layout.dtsi file. No functional change. OpenBMC-Staging-Count: 5 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: aspeed-palmetto: Add i2c OCC hwmon nodeJoel Stanley2019-03-201-0/+5
| | | | | | | | | | OpenBMC-Staging-Count: 5 Signed-off-by: Joel Stanley <joel@jms.id.au>
* | ARM: dts: npcm7xx: Update device treeTomer Maimon2019-03-204-143/+249
| | | | | | | | | | | | | | | | | | Modify NPCM7xx device tree FIU, ADC, RST, VCD and SPI nodes Add regulator and HGPIO pins nodes. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
* | dts: npcm7xx: Modify NPCM7xx device treeTomer Maimon2019-03-204-33/+3701
|/ | | | | | | | | Modify NPCM7xx device tree to support all NPCM7xx modules drivers. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
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