diff options
Diffstat (limited to 'arch/arm/mach-lh7a40x')
30 files changed, 0 insertions, 3316 deletions
diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig deleted file mode 100644 index 9be7466e346c..000000000000 --- a/arch/arm/mach-lh7a40x/Kconfig +++ /dev/null @@ -1,74 +0,0 @@ -if ARCH_LH7A40X - -menu "LH7A40X Implementations" - -config MACH_KEV7A400 - bool "KEV7A400" - select ARCH_LH7A400 - help - Say Y here if you are using the Sharp KEV7A400 development - board. This hardware is discontinued, so I'd be very - surprised if you wanted this option. - -config MACH_LPD7A400 - bool "LPD7A400 Card Engine" - select ARCH_LH7A400 -# select IDE_POLL -# select HAS_TOUCHSCREEN_ADS7843_LH7 - help - Say Y here if you are using Logic Product Development's - LPD7A400 CardEngine. For the time being, the LPD7A400 and - LPD7A404 options are mutually exclusive. - -config MACH_LPD7A404 - bool "LPD7A404 Card Engine" - select ARCH_LH7A404 -# select IDE_POLL -# select HAS_TOUCHSCREEN_ADC_LH7 - help - Say Y here if you are using Logic Product Development's - LPD7A404 CardEngine. For the time being, the LPD7A400 and - LPD7A404 options are mutually exclusive. - -config ARCH_LH7A400 - bool - -config ARCH_LH7A404 - bool - -config LPD7A40X_CPLD_SSP - bool - -config LH7A40X_CONTIGMEM - bool "Disable NUMA/SparseMEM Support" - help - Say Y here if your bootloader sets the SROMLL bit(s) in - the SDRAM controller, organizing memory as a contiguous - array. This option will disable sparse memory support - and force the kernel to manage all memory in one node. - - Setting this option incorrectly may prevent the kernel - from booting. It is OK to leave it N. - - For more information, consult - <file:Documentation/arm/Sharp-LH/SDRAM>. - -config LH7A40X_ONE_BANK_PER_NODE - bool "Optimize NUMA Node Tables for Size" - depends on !LH7A40X_CONTIGMEM - help - Say Y here to produce compact memory node tables. By - default pairs of adjacent physical RAM banks are managed - together in a single node, incurring some wasted overhead - in the node tables, however also maintaining compatibility - with systems where physical memory is truly contiguous. - - Setting this option incorrectly may prevent the kernel from - booting. It is OK to leave it N. - - For more information, consult - <file:Documentation/arm/Sharp-LH/SDRAM>. - -endmenu - -endif diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile deleted file mode 100644 index 94b8615fb3c3..000000000000 --- a/arch/arm/mach-lh7a40x/Makefile +++ /dev/null @@ -1,17 +0,0 @@ -# -# Makefile for the linux kernel. -# - -# Object file lists. - -obj-y := time.o clocks.o -obj-m := -obj-n := -obj- := - -obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o -obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o -obj-$(CONFIG_LPD7A40X_CPLD_SSP) += ssp-cpld.o -obj-$(CONFIG_FB_ARMCLCD) += clcd.o - diff --git a/arch/arm/mach-lh7a40x/Makefile.boot b/arch/arm/mach-lh7a40x/Makefile.boot deleted file mode 100644 index af941be076eb..000000000000 --- a/arch/arm/mach-lh7a40x/Makefile.boot +++ /dev/null @@ -1,4 +0,0 @@ - zreladdr-y := 0xc0008000 -params_phys-y := 0xc0000100 -initrd_phys-y := 0xc4000000 - diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c deleted file mode 100644 index 71129c33c7d2..000000000000 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ /dev/null @@ -1,118 +0,0 @@ -/* arch/arm/mach-lh7a40x/arch-kev7a400.c - * - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/tty.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/interrupt.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include "common.h" - - /* This function calls the board specific IRQ initialization function. */ - -static struct map_desc kev7a400_io_desc[] __initdata = { - { - .virtual = IO_VIRT, - .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, - .type = MT_DEVICE - }, { - .virtual = CPLD_VIRT, - .pfn = __phys_to_pfn(CPLD_PHYS), - .length = CPLD_SIZE, - .type = MT_DEVICE - } -}; - -void __init kev7a400_map_io(void) -{ - iotable_init (kev7a400_io_desc, ARRAY_SIZE (kev7a400_io_desc)); -} - -static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ - -static void kev7a400_ack_cpld_irq(struct irq_data *d) -{ - CPLD_CL_INT = 1 << (d->irq - IRQ_KEV7A400_CPLD); -} - -static void kev7a400_mask_cpld_irq(struct irq_data *d) -{ - CPLD_IRQ_mask &= ~(1 << (d->irq - IRQ_KEV7A400_CPLD)); - CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; -} - -static void kev7a400_unmask_cpld_irq(struct irq_data *d) -{ - CPLD_IRQ_mask |= 1 << (d->irq - IRQ_KEV7A400_CPLD); - CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; -} - -static struct irq_chip kev7a400_cpld_chip = { - .name = "CPLD", - .irq_ack = kev7a400_ack_cpld_irq, - .irq_mask = kev7a400_mask_cpld_irq, - .irq_unmask = kev7a400_unmask_cpld_irq, -}; - - -static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc) -{ - u32 mask = CPLD_LATCHED_INTS; - irq = IRQ_KEV7A400_CPLD; - for (; mask; mask >>= 1, ++irq) - if (mask & 1) - generic_handle_irq(irq); -} - -void __init lh7a40x_init_board_irq (void) -{ - int irq; - - for (irq = IRQ_KEV7A400_CPLD; - irq < IRQ_KEV7A400_CPLD + NR_IRQ_BOARD; ++irq) { - set_irq_chip (irq, &kev7a400_cpld_chip); - set_irq_handler (irq, handle_edge_irq); - set_irq_flags (irq, IRQF_VALID); - } - set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler); - - /* Clear all CPLD interrupts */ - CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */ - - GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */ - barrier(); - -#if 0 - GPIO_INTTYPE1 - = (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */ - GPIO_INTTYPE2 = 0; /* Falling edge & low-level */ - GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */ - GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */ - - init_FIQ(); -#endif -} - -MACHINE_START (KEV7A400, "Sharp KEV7a400") - /* Maintainer: Marc Singer */ - .boot_params = 0xc0000100, - .map_io = kev7a400_map_io, - .init_irq = lh7a400_init_irq, - .timer = &lh7a40x_timer, -MACHINE_END diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c deleted file mode 100644 index e735546181ad..000000000000 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ /dev/null @@ -1,422 +0,0 @@ -/* arch/arm/mach-lh7a40x/arch-lpd7a40x.c - * - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/tty.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/irq.h> - -#include <mach/hardware.h> -#include <asm/setup.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include "common.h" - -#define CPLD_INT_NETHERNET (1<<0) -#define CPLD_INTMASK_ETHERNET (1<<2) -#if defined (CONFIG_MACH_LPD7A400) -# define CPLD_INT_NTOUCH (1<<1) -# define CPLD_INTMASK_TOUCH (1<<3) -# define CPLD_INT_PEN (1<<4) -# define CPLD_INTMASK_PEN (1<<4) -# define CPLD_INT_PIRQ (1<<4) -#endif -#define CPLD_INTMASK_CPLD (1<<7) -#define CPLD_INT_CPLD (1<<6) - -#define CPLD_CONTROL_SWINT (1<<7) /* Disable all CPLD IRQs */ -#define CPLD_CONTROL_OCMSK (1<<6) /* Mask USB1 connect IRQ */ -#define CPLD_CONTROL_PDRV (1<<5) /* PCC_nDRV high */ -#define CPLD_CONTROL_USB1C (1<<4) /* USB1 connect IRQ active */ -#define CPLD_CONTROL_USB1P (1<<3) /* USB1 power disable */ -#define CPLD_CONTROL_AWKP (1<<2) /* Auto-wakeup disabled */ -#define CPLD_CONTROL_LCD_ENABLE (1<<1) /* LCD Vee enable */ -#define CPLD_CONTROL_WRLAN_NENABLE (1<<0) /* SMC91x power disable */ - - -static struct resource smc91x_resources[] = { - [0] = { - .start = CPLD00_PHYS, - .end = CPLD00_PHYS + CPLD00_SIZE - 1, /* Only needs 16B */ - .flags = IORESOURCE_MEM, - }, - - [1] = { - .start = IRQ_LPD7A40X_ETH_INT, - .end = IRQ_LPD7A40X_ETH_INT, - .flags = IORESOURCE_IRQ, - }, - -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct resource lh7a40x_usbclient_resources[] = { - [0] = { - .start = USB_PHYS, - .end = (USB_PHYS + PAGE_SIZE), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USB, - .end = IRQ_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL; - -static struct platform_device lh7a40x_usbclient_device = { -// .name = "lh7a40x_udc", - .name = "lh7-udc", - .id = 0, - .dev = { - .dma_mask = &lh7a40x_usbclient_dma_mask, - .coherent_dma_mask = 0xffffffffUL, - }, - .num_resources = ARRAY_SIZE (lh7a40x_usbclient_resources), - .resource = lh7a40x_usbclient_resources, -}; - -#if defined (CONFIG_ARCH_LH7A404) - -static struct resource lh7a404_usbhost_resources [] = { - [0] = { - .start = USBH_PHYS, - .end = (USBH_PHYS + 0xFF), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USHINTR, - .end = IRQ_USHINTR, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 lh7a404_usbhost_dma_mask = 0xffffffffUL; - -static struct platform_device lh7a404_usbhost_device = { - .name = "lh7a404-ohci", - .id = 0, - .dev = { - .dma_mask = &lh7a404_usbhost_dma_mask, - .coherent_dma_mask = 0xffffffffUL, - }, - .num_resources = ARRAY_SIZE (lh7a404_usbhost_resources), - .resource = lh7a404_usbhost_resources, -}; - -#endif - -static struct platform_device* lpd7a40x_devs[] __initdata = { - &smc91x_device, - &lh7a40x_usbclient_device, -#if defined (CONFIG_ARCH_LH7A404) - &lh7a404_usbhost_device, -#endif -}; - -extern void lpd7a400_map_io (void); - -static void __init lpd7a40x_init (void) -{ -#if defined (CONFIG_MACH_LPD7A400) - CPLD_CONTROL |= 0 - | CPLD_CONTROL_SWINT /* Disable software interrupt */ - | CPLD_CONTROL_OCMSK; /* Mask USB1 connection IRQ */ - CPLD_CONTROL &= ~(0 - | CPLD_CONTROL_LCD_ENABLE /* Disable LCD */ - | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ - ); -#endif - -#if defined (CONFIG_MACH_LPD7A404) - CPLD_CONTROL &= ~(0 - | CPLD_CONTROL_WRLAN_NENABLE /* Enable SMC91x */ - ); -#endif - - platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs)); -#if defined (CONFIG_FB_ARMCLCD) - lh7a40x_clcd_init (); -#endif -} - -static void lh7a40x_ack_cpld_irq(struct irq_data *d) -{ - /* CPLD doesn't have ack capability, but some devices may */ - -#if defined (CPLD_INTMASK_TOUCH) - /* The touch control *must* mask the interrupt because the - * interrupt bit is read by the driver to determine if the pen - * is still down. */ - if (d->irq == IRQ_TOUCH) - CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; -#endif -} - -static void lh7a40x_mask_cpld_irq(struct irq_data *d) -{ - switch (d->irq) { - case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; - break; -#if defined (IRQ_TOUCH) - case IRQ_TOUCH: - CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; - break; -#endif - } -} - -static void lh7a40x_unmask_cpld_irq(struct irq_data *d) -{ - switch (d->irq) { - case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; - break; -#if defined (IRQ_TOUCH) - case IRQ_TOUCH: - CPLD_INTERRUPTS &= ~CPLD_INTMASK_TOUCH; - break; -#endif - } -} - -static struct irq_chip lpd7a40x_cpld_chip = { - .name = "CPLD", - .irq_ack = lh7a40x_ack_cpld_irq, - .irq_mask = lh7a40x_mask_cpld_irq, - .irq_unmask = lh7a40x_unmask_cpld_irq, -}; - -static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) -{ - unsigned int mask = CPLD_INTERRUPTS; - - desc->irq_data.chip->irq_ack(&desc->irq_data); - - if ((mask & (1<<0)) == 0) /* WLAN */ - generic_handle_irq(IRQ_LPD7A40X_ETH_INT); - -#if defined (IRQ_TOUCH) - if ((mask & (1<<1)) == 0) /* Touch */ - generic_handle_irq(IRQ_TOUCH); -#endif - - /* Level-triggered need this */ - desc->irq_data.chip->irq_unmask(&desc->irq_data); -} - - -void __init lh7a40x_init_board_irq (void) -{ - int irq; - - /* Rev A (v2.8): PF0, PF1, PF2, and PF3 are available IRQs. - PF7 supports the CPLD. - Rev B (v3.4): PF0, PF1, and PF2 are available IRQs. - PF3 supports the CPLD. - (Some) LPD7A404 prerelease boards report a version - number of 0x16, but we force an override since the - hardware is of the newer variety. - */ - - unsigned char cpld_version = CPLD_REVISION; - int pinCPLD = (cpld_version == 0x28) ? 7 : 3; - -#if defined CONFIG_MACH_LPD7A404 - cpld_version = 0x34; /* Coerce LPD7A404 to RevB */ -#endif - - /* First, configure user controlled GPIOF interrupts */ - - GPIO_PFDD &= ~0x0f; /* PF0-3 are inputs */ - GPIO_INTTYPE1 &= ~0x0f; /* PF0-3 are level triggered */ - GPIO_INTTYPE2 &= ~0x0f; /* PF0-3 are active low */ - barrier (); - GPIO_GPIOFINTEN |= 0x0f; /* Enable PF0, PF1, PF2, and PF3 IRQs */ - - /* Then, configure CPLD interrupt */ - - /* Disable all CPLD interrupts */ -#if defined (CONFIG_MACH_LPD7A400) - CPLD_INTERRUPTS = CPLD_INTMASK_TOUCH | CPLD_INTMASK_PEN - | CPLD_INTMASK_ETHERNET; - /* *** FIXME: don't know why we need 7 and 4. 7 is way wrong - and 4 is uncefined. */ - // (1<<7)|(1<<4)|(1<<3)|(1<<2); -#endif -#if defined (CONFIG_MACH_LPD7A404) - CPLD_INTERRUPTS = CPLD_INTMASK_ETHERNET; - /* *** FIXME: don't know why we need 6 and 5, neither is defined. */ - // (1<<6)|(1<<5)|(1<<3); -#endif - GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ - GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */ - GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ - barrier (); - GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ - - /* Cascade CPLD interrupts */ - - for (irq = IRQ_BOARD_START; - irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { - set_irq_chip (irq, &lpd7a40x_cpld_chip); - set_irq_handler (irq, handle_level_irq); - set_irq_flags (irq, IRQF_VALID); - } - - set_irq_chained_handler ((cpld_version == 0x28) - ? IRQ_CPLD_V28 - : IRQ_CPLD_V34, - lpd7a40x_cpld_handler); -} - -static struct map_desc lpd7a40x_io_desc[] __initdata = { - { - .virtual = IO_VIRT, - .pfn = __phys_to_pfn(IO_PHYS), - .length = IO_SIZE, - .type = MT_DEVICE - }, - { /* Mapping added to work around chip select problems */ - .virtual = IOBARRIER_VIRT, - .pfn = __phys_to_pfn(IOBARRIER_PHYS), - .length = IOBARRIER_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CF_VIRT, - .pfn = __phys_to_pfn(CF_PHYS), - .length = CF_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD02_VIRT, - .pfn = __phys_to_pfn(CPLD02_PHYS), - .length = CPLD02_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD06_VIRT, - .pfn = __phys_to_pfn(CPLD06_PHYS), - .length = CPLD06_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD08_VIRT, - .pfn = __phys_to_pfn(CPLD08_PHYS), - .length = CPLD08_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD08_VIRT, - .pfn = __phys_to_pfn(CPLD08_PHYS), - .length = CPLD08_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD0A_VIRT, - .pfn = __phys_to_pfn(CPLD0A_PHYS), - .length = CPLD0A_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD0C_VIRT, - .pfn = __phys_to_pfn(CPLD0C_PHYS), - .length = CPLD0C_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD0E_VIRT, - .pfn = __phys_to_pfn(CPLD0E_PHYS), - .length = CPLD0E_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD10_VIRT, - .pfn = __phys_to_pfn(CPLD10_PHYS), - .length = CPLD10_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD12_VIRT, - .pfn = __phys_to_pfn(CPLD12_PHYS), - .length = CPLD12_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD14_VIRT, - .pfn = __phys_to_pfn(CPLD14_PHYS), - .length = CPLD14_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD16_VIRT, - .pfn = __phys_to_pfn(CPLD16_PHYS), - .length = CPLD16_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD18_VIRT, - .pfn = __phys_to_pfn(CPLD18_PHYS), - .length = CPLD18_SIZE, - .type = MT_DEVICE - }, - { - .virtual = CPLD1A_VIRT, - .pfn = __phys_to_pfn(CPLD1A_PHYS), - .length = CPLD1A_SIZE, - .type = MT_DEVICE - }, -}; - -void __init -lpd7a40x_map_io(void) -{ - iotable_init (lpd7a40x_io_desc, ARRAY_SIZE (lpd7a40x_io_desc)); -} - -#ifdef CONFIG_MACH_LPD7A400 - -MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10") - /* Maintainer: Marc Singer */ - .boot_params = 0xc0000100, - .map_io = lpd7a40x_map_io, - .init_irq = lh7a400_init_irq, - .timer = &lh7a40x_timer, - .init_machine = lpd7a40x_init, -MACHINE_END - -#endif - -#ifdef CONFIG_MACH_LPD7A404 - -MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10") - /* Maintainer: Marc Singer */ - .boot_params = 0xc0000100, - .map_io = lpd7a40x_map_io, - .init_irq = lh7a404_init_irq, - .timer = &lh7a40x_timer, - .init_machine = lpd7a40x_init, -MACHINE_END - -#endif diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c deleted file mode 100644 index 7fe4fd347c82..000000000000 --- a/arch/arm/mach-lh7a40x/clcd.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * arch/arm/mach-lh7a40x/clcd.c - * - * Copyright (C) 2004 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/init.h> -#include <linux/gfp.h> -#include <linux/device.h> -#include <linux/dma-mapping.h> -#include <linux/sysdev.h> -#include <linux/interrupt.h> - -//#include <linux/module.h> -//#include <linux/time.h> - -//#include <asm/mach/time.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> - -#include <asm/system.h> -#include <mach/hardware.h> -#include <linux/amba/bus.h> -#include <linux/amba/clcd.h> - -#define HRTFTC_HRSETUP __REG(HRTFTC_PHYS + 0x00) -#define HRTFTC_HRCON __REG(HRTFTC_PHYS + 0x04) -#define HRTFTC_HRTIMING1 __REG(HRTFTC_PHYS + 0x08) -#define HRTFTC_HRTIMING2 __REG(HRTFTC_PHYS + 0x0c) - -#define ALI_SETUP __REG(ALI_PHYS + 0x00) -#define ALI_CONTROL __REG(ALI_PHYS + 0x04) -#define ALI_TIMING1 __REG(ALI_PHYS + 0x08) -#define ALI_TIMING2 __REG(ALI_PHYS + 0x0c) - -#include "lcd-panel.h" - -static void lh7a40x_clcd_disable (struct clcd_fb *fb) -{ -#if defined (CONFIG_MACH_LPD7A400) - CPLD_CONTROL &= ~(1<<1); /* Disable LCD Vee */ -#endif - -#if defined (CONFIG_MACH_LPD7A404) - GPIO_PCD &= ~(1<<3); /* Disable LCD Vee */ -#endif - -#if defined (CONFIG_ARCH_LH7A400) - HRTFTC_HRSETUP &= ~(1<<13); /* Disable HRTFT controller */ -#endif - -#if defined (CONFIG_ARCH_LH7A404) - ALI_SETUP &= ~(1<<13); /* Disable ALI */ -#endif -} - -static void lh7a40x_clcd_enable (struct clcd_fb *fb) -{ - struct clcd_panel_extra* extra - = (struct clcd_panel_extra*) fb->board_data; - -#if defined (CONFIG_MACH_LPD7A400) - CPLD_CONTROL |= (1<<1); /* Enable LCD Vee */ -#endif - -#if defined (CONFIG_MACH_LPD7A404) - GPIO_PCDD &= ~(1<<3); /* Enable LCD Vee */ - GPIO_PCD |= (1<<3); -#endif - -#if defined (CONFIG_ARCH_LH7A400) - - if (extra) { - HRTFTC_HRSETUP - = (1 << 13) - | ((fb->fb.var.xres - 1) << 4) - | 0xc - | (extra->hrmode ? 1 : 0); - HRTFTC_HRCON - = ((extra->clsen ? 1 : 0) << 1) - | ((extra->spsen ? 1 : 0) << 0); - HRTFTC_HRTIMING1 - = (extra->pcdel << 8) - | (extra->revdel << 4) - | (extra->lpdel << 0); - HRTFTC_HRTIMING2 - = (extra->spldel << 9) - | (extra->pc2del << 0); - } - else - HRTFTC_HRSETUP - = (1 << 13) - | 0xc; -#endif - -#if defined (CONFIG_ARCH_LH7A404) - - if (extra) { - ALI_SETUP - = (1 << 13) - | ((fb->fb.var.xres - 1) << 4) - | 0xc - | (extra->hrmode ? 1 : 0); - ALI_CONTROL - = ((extra->clsen ? 1 : 0) << 1) - | ((extra->spsen ? 1 : 0) << 0); - ALI_TIMING1 - = (extra->pcdel << 8) - | (extra->revdel << 4) - | (extra->lpdel << 0); - ALI_TIMING2 - = (extra->spldel << 9) - | (extra->pc2del << 0); - } - else - ALI_SETUP - = (1 << 13) - | 0xc; -#endif - -} - -#define FRAMESIZE(s) (((s) + PAGE_SIZE - 1)&PAGE_MASK) - -static int lh7a40x_clcd_setup (struct clcd_fb *fb) -{ - dma_addr_t dma; - u32 len = FRAMESIZE (lcd_panel.mode.xres*lcd_panel.mode.yres - *(lcd_panel.bpp/8)); - - fb->panel = &lcd_panel; - - /* Enforce the sync polarity defaults */ - if (!(fb->panel->tim2 & TIM2_IHS)) - fb->fb.var.sync |= FB_SYNC_HOR_HIGH_ACT; - if (!(fb->panel->tim2 & TIM2_IVS)) - fb->fb.var.sync |= FB_SYNC_VERT_HIGH_ACT; - -#if defined (HAS_LCD_PANEL_EXTRA) - fb->board_data = &lcd_panel_extra; -#endif - - fb->fb.screen_base - = dma_alloc_writecombine (&fb->dev->dev, len, - &dma, GFP_KERNEL); - printk ("CLCD: LCD setup fb virt 0x%p phys 0x%p l %x io 0x%p \n", - fb->fb.screen_base, (void*) dma, len, - (void*) io_p2v (CLCDC_PHYS)); - printk ("CLCD: pixclock %d\n", lcd_panel.mode.pixclock); - - if (!fb->fb.screen_base) { - printk(KERN_ERR "CLCD: unable to map framebuffer\n"); - return -ENOMEM; - } - -#if defined (USE_RGB555) - fb->fb.var.green.length = 5; /* Panel uses RGB 5:5:5 */ -#endif - - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = len; - - /* Drive PE4 high to prevent CPLD crash */ - GPIO_PEDD |= (1<<4); - GPIO_PED |= (1<<4); - - GPIO_PINMUX |= (1<<1) | (1<<0); /* LCDVD[15:4] */ - -// fb->fb.fbops->fb_check_var (&fb->fb.var, &fb->fb); -// fb->fb.fbops->fb_set_par (&fb->fb); - - return 0; -} - -static int lh7a40x_clcd_mmap (struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_writecombine(&fb->dev->dev, vma, - fb->fb.screen_base, - fb->fb.fix.smem_start, - fb->fb.fix.smem_len); -} - -static void lh7a40x_clcd_remove (struct clcd_fb *fb) -{ - dma_free_writecombine (&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); -} - -static struct clcd_board clcd_platform_data = { - .name = "lh7a40x FB", - .check = clcdfb_check, - .decode = clcdfb_decode, - .enable = lh7a40x_clcd_enable, - .setup = lh7a40x_clcd_setup, - .mmap = lh7a40x_clcd_mmap, - .remove = lh7a40x_clcd_remove, - .disable = lh7a40x_clcd_disable, -}; - -#define IRQ_CLCDC (IRQ_LCDINTR) - -#define AMBA_DEVICE(name,busid,base,plat,pid) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = base##_PHYS, \ - .end = (base##_PHYS) + (4*1024) - 1, \ - .flags = IORESOURCE_MEM, \ - }, \ - .dma_mask = ~0, \ - .irq = { IRQ_##base, }, \ - /* .dma = base##_DMA,*/ \ - .periphid = pid, \ -} - -AMBA_DEVICE(clcd, "cldc-lh7a40x", CLCDC, &clcd_platform_data, 0x41110); - -static struct amba_device *amba_devs[] __initdata = { - &clcd_device, -}; - -void __init lh7a40x_clcd_init (void) -{ - int i; - int result; - printk ("CLCD: registering amba devices\n"); - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - result = amba_device_register(d, &iomem_resource); - printk (" %d -> %d\n", i ,result); - } -} diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c deleted file mode 100644 index 0651f96653f9..000000000000 --- a/arch/arm/mach-lh7a40x/clocks.c +++ /dev/null @@ -1,108 +0,0 @@ -/* arch/arm/mach-lh7a40x/clocks.c - * - * Copyright (C) 2004 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ -#include <mach/hardware.h> -#include <mach/clocks.h> -#include <linux/err.h> -#include <linux/device.h> -#include <linux/string.h> - -struct module; - -struct clk { - struct list_head node; - unsigned long rate; - struct module *owner; - const char *name; -}; - -/* ----- */ - -#define MAINDIV1(c) (((c) >> 7) & 0x0f) -#define MAINDIV2(c) (((c) >> 11) & 0x1f) -#define PS(c) (((c) >> 18) & 0x03) -#define PREDIV(c) (((c) >> 2) & 0x1f) -#define HCLKDIV(c) (((c) >> 0) & 0x02) -#define PCLKDIV(c) (((c) >> 16) & 0x03) - -unsigned int fclkfreq_get (void) -{ - unsigned int clkset = CSC_CLKSET; - unsigned int gclk - = XTAL_IN - / (1 << PS(clkset)) - * (MAINDIV1(clkset) + 2) - / (PREDIV(clkset) + 2) - * (MAINDIV2(clkset) + 2) - ; - return gclk; -} - -unsigned int hclkfreq_get (void) -{ - unsigned int clkset = CSC_CLKSET; - unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1); - - return hclk; -} - -unsigned int pclkfreq_get (void) -{ - unsigned int clkset = CSC_CLKSET; - int pclkdiv = PCLKDIV(clkset); - unsigned int pclk; - if (pclkdiv == 0x3) - pclkdiv = 0x2; - pclk = hclkfreq_get () / (1 << pclkdiv); - - return pclk; -} - -/* ----- */ - -struct clk *clk_get (struct device *dev, const char *id) -{ - return dev && strcmp(dev_name(dev), "cldc-lh7a40x") == 0 - ? NULL : ERR_PTR(-ENOENT); -} -EXPORT_SYMBOL(clk_get); - -void clk_put (struct clk *clk) -{ -} -EXPORT_SYMBOL(clk_put); - -int clk_enable (struct clk *clk) -{ - return 0; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable (struct clk *clk) -{ -} -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate (struct clk *clk) -{ - return 0; -} -EXPORT_SYMBOL(clk_get_rate); - -long clk_round_rate (struct clk *clk, unsigned long rate) -{ - return rate; -} -EXPORT_SYMBOL(clk_round_rate); - -int clk_set_rate (struct clk *clk, unsigned long rate) -{ - return -EIO; -} -EXPORT_SYMBOL(clk_set_rate); diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h deleted file mode 100644 index 6ed3f6b6db76..000000000000 --- a/arch/arm/mach-lh7a40x/common.h +++ /dev/null @@ -1,17 +0,0 @@ -/* arch/arm/mach-lh7a40x/common.h - * - * Copyright (C) 2004 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -extern struct sys_timer lh7a40x_timer; - -extern void lh7a400_init_irq (void); -extern void lh7a404_init_irq (void); -extern void lh7a40x_clcd_init (void); -extern void lh7a40x_init_board_irq (void); - diff --git a/arch/arm/mach-lh7a40x/include/mach/clocks.h b/arch/arm/mach-lh7a40x/include/mach/clocks.h deleted file mode 100644 index fe2e0255c084..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/clocks.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/clocks.h - * - * Copyright (C) 2004 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_CLOCKS_H -#define __ASM_ARCH_CLOCKS_H - -unsigned int fclkfreq_get (void); -unsigned int hclkfreq_get (void); -unsigned int pclkfreq_get (void); - -#endif /* _ASM_ARCH_CLOCKS_H */ diff --git a/arch/arm/mach-lh7a40x/include/mach/constants.h b/arch/arm/mach-lh7a40x/include/mach/constants.h deleted file mode 100644 index 55c6edbc2dfd..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/constants.h +++ /dev/null @@ -1,91 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/constants.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_CONSTANTS_H -#define __ASM_ARCH_CONSTANTS_H - - -/* Addressing constants */ - - /* SoC CPU IO addressing */ -#define IO_PHYS (0x80000000) -#define IO_VIRT (0xf8000000) -#define IO_SIZE (0x0000B000) - -#ifdef CONFIG_MACH_KEV7A400 -# define CPLD_PHYS (0x20000000) -# define CPLD_VIRT (0xf2000000) -# define CPLD_SIZE PAGE_SIZE -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) - -# define IOBARRIER_PHYS 0x10000000 /* Second bank, fastest timing */ -# define IOBARRIER_VIRT 0xf0000000 -# define IOBARRIER_SIZE PAGE_SIZE - -# define CF_PHYS 0x60200000 -# define CF_VIRT 0xf6020000 -# define CF_SIZE (8*1024) - - /* The IO mappings for the LPD CPLD are, unfortunately, sparse. */ -# define CPLDX_PHYS(x) (0x70000000 | ((x) << 20)) -# define CPLDX_VIRT(x) (0xf7000000 | ((x) << 16)) -# define CPLD00_PHYS CPLDX_PHYS (0x00) /* Wired LAN */ -# define CPLD00_VIRT CPLDX_VIRT (0x00) -# define CPLD00_SIZE PAGE_SIZE -# define CPLD02_PHYS CPLDX_PHYS (0x02) -# define CPLD02_VIRT CPLDX_VIRT (0x02) -# define CPLD02_SIZE PAGE_SIZE -# define CPLD06_PHYS CPLDX_PHYS (0x06) -# define CPLD06_VIRT CPLDX_VIRT (0x06) -# define CPLD06_SIZE PAGE_SIZE -# define CPLD08_PHYS CPLDX_PHYS (0x08) -# define CPLD08_VIRT CPLDX_VIRT (0x08) -# define CPLD08_SIZE PAGE_SIZE -# define CPLD0A_PHYS CPLDX_PHYS (0x0a) -# define CPLD0A_VIRT CPLDX_VIRT (0x0a) -# define CPLD0A_SIZE PAGE_SIZE -# define CPLD0C_PHYS CPLDX_PHYS (0x0c) -# define CPLD0C_VIRT CPLDX_VIRT (0x0c) -# define CPLD0C_SIZE PAGE_SIZE -# define CPLD0E_PHYS CPLDX_PHYS (0x0e) -# define CPLD0E_VIRT CPLDX_VIRT (0x0e) -# define CPLD0E_SIZE PAGE_SIZE -# define CPLD10_PHYS CPLDX_PHYS (0x10) -# define CPLD10_VIRT CPLDX_VIRT (0x10) -# define CPLD10_SIZE PAGE_SIZE -# define CPLD12_PHYS CPLDX_PHYS (0x12) -# define CPLD12_VIRT CPLDX_VIRT (0x12) -# define CPLD12_SIZE PAGE_SIZE -# define CPLD14_PHYS CPLDX_PHYS (0x14) -# define CPLD14_VIRT CPLDX_VIRT (0x14) -# define CPLD14_SIZE PAGE_SIZE -# define CPLD16_PHYS CPLDX_PHYS (0x16) -# define CPLD16_VIRT CPLDX_VIRT (0x16) -# define CPLD16_SIZE PAGE_SIZE -# define CPLD18_PHYS CPLDX_PHYS (0x18) -# define CPLD18_VIRT CPLDX_VIRT (0x18) -# define CPLD18_SIZE PAGE_SIZE -# define CPLD1A_PHYS CPLDX_PHYS (0x1a) -# define CPLD1A_VIRT CPLDX_VIRT (0x1a) -# define CPLD1A_SIZE PAGE_SIZE -#endif - - /* Timing constants */ - -#define XTAL_IN 14745600 /* 14.7456 MHz crystal */ -#define PLL_CLOCK (XTAL_IN * 21) /* 309 MHz PLL clock */ -#define MAX_HCLK_KHZ 100000 /* HCLK max limit ~100MHz */ -#define HCLK (99993600) -//#define HCLK (119808000) - -#endif /* __ASM_ARCH_CONSTANTS_H */ diff --git a/arch/arm/mach-lh7a40x/include/mach/debug-macro.S b/arch/arm/mach-lh7a40x/include/mach/debug-macro.S deleted file mode 100644 index cff33625276f..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/debug-macro.S +++ /dev/null @@ -1,37 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - @ It is not known if this will be appropriate for every 40x - @ board. - - .macro addruart, rp, rv - mov \rp, #0x00000700 @ offset from base - orr \rv, \rp, #0xf8000000 @ virtual base - orr \rp, \rp, #0x80000000 @ physical base - .endm - - .macro senduart,rd,rx - strb \rd, [\rx] @ DATA - .endm - - .macro busyuart,rd,rx @ spin while busy -1001: ldr \rd, [\rx, #0x10] @ STATUS - tst \rd, #1 << 3 @ BUSY (TX FIFO not empty) - bne 1001b @ yes, spin - .endm - - .macro waituart,rd,rx @ wait for Tx FIFO room -1001: ldrb \rd, [\rx, #0x10] @ STATUS - tst \rd, #1 << 5 @ TXFF (TX FIFO full) - bne 1001b @ yes, spin - .endm diff --git a/arch/arm/mach-lh7a40x/include/mach/dma.h b/arch/arm/mach-lh7a40x/include/mach/dma.h deleted file mode 100644 index baa3f8dbd04b..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/dma.h +++ /dev/null @@ -1,86 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/dma.h - * - * Copyright (C) 2005 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -typedef enum { - DMA_M2M0 = 0, - DMA_M2M1 = 1, - DMA_M2P0 = 2, /* Tx */ - DMA_M2P1 = 3, /* Rx */ - DMA_M2P2 = 4, /* Tx */ - DMA_M2P3 = 5, /* Rx */ - DMA_M2P4 = 6, /* Tx - AC97 */ - DMA_M2P5 = 7, /* Rx - AC97 */ - DMA_M2P6 = 8, /* Tx */ - DMA_M2P7 = 9, /* Rx */ -} dma_device_t; - -#define DMA_LENGTH_MAX ((64*1024) - 4) /* bytes */ - -#define DMAC_GCA __REG(DMAC_PHYS + 0x2b80) -#define DMAC_GIR __REG(DMAC_PHYS + 0x2bc0) - -#define DMAC_GIR_MMI1 (1<<11) -#define DMAC_GIR_MMI0 (1<<10) -#define DMAC_GIR_MPI8 (1<<9) -#define DMAC_GIR_MPI9 (1<<8) -#define DMAC_GIR_MPI6 (1<<7) -#define DMAC_GIR_MPI7 (1<<6) -#define DMAC_GIR_MPI4 (1<<5) -#define DMAC_GIR_MPI5 (1<<4) -#define DMAC_GIR_MPI2 (1<<3) -#define DMAC_GIR_MPI3 (1<<2) -#define DMAC_GIR_MPI0 (1<<1) -#define DMAC_GIR_MPI1 (1<<0) - -#define DMAC_M2P0 0x0000 -#define DMAC_M2P1 0x0040 -#define DMAC_M2P2 0x0080 -#define DMAC_M2P3 0x00c0 -#define DMAC_M2P4 0x0240 -#define DMAC_M2P5 0x0200 -#define DMAC_M2P6 0x02c0 -#define DMAC_M2P7 0x0280 -#define DMAC_M2P8 0x0340 -#define DMAC_M2P9 0x0300 -#define DMAC_M2M0 0x0100 -#define DMAC_M2M1 0x0140 - -#define DMAC_P_PCONTROL(c) __REG(DMAC_PHYS + (c) + 0x00) -#define DMAC_P_PINTERRUPT(c) __REG(DMAC_PHYS + (c) + 0x04) -#define DMAC_P_PPALLOC(c) __REG(DMAC_PHYS + (c) + 0x08) -#define DMAC_P_PSTATUS(c) __REG(DMAC_PHYS + (c) + 0x0c) -#define DMAC_P_REMAIN(c) __REG(DMAC_PHYS + (c) + 0x14) -#define DMAC_P_MAXCNT0(c) __REG(DMAC_PHYS + (c) + 0x20) -#define DMAC_P_BASE0(c) __REG(DMAC_PHYS + (c) + 0x24) -#define DMAC_P_CURRENT0(c) __REG(DMAC_PHYS + (c) + 0x28) -#define DMAC_P_MAXCNT1(c) __REG(DMAC_PHYS + (c) + 0x30) -#define DMAC_P_BASE1(c) __REG(DMAC_PHYS + (c) + 0x34) -#define DMAC_P_CURRENT1(c) __REG(DMAC_PHYS + (c) + 0x38) - -#define DMAC_PCONTROL_ENABLE (1<<4) - -#define DMAC_PORT_USB 0 -#define DMAC_PORT_SDMMC 1 -#define DMAC_PORT_AC97_1 2 -#define DMAC_PORT_AC97_2 3 -#define DMAC_PORT_AC97_3 4 -#define DMAC_PORT_UART1 6 -#define DMAC_PORT_UART2 7 -#define DMAC_PORT_UART3 8 - -#define DMAC_PSTATUS_CURRSTATE_SHIFT 4 -#define DMAC_PSTATUS_CURRSTATE_MASK 0x3 - -#define DMAC_PSTATUS_NEXTBUF (1<<6) -#define DMAC_PSTATUS_STALLRINT (1<<0) - -#define DMAC_INT_CHE (1<<3) -#define DMAC_INT_NFB (1<<1) -#define DMAC_INT_STALL (1<<0) diff --git a/arch/arm/mach-lh7a40x/include/mach/entry-macro.S b/arch/arm/mach-lh7a40x/include/mach/entry-macro.S deleted file mode 100644 index 069bb4cefff7..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/entry-macro.S +++ /dev/null @@ -1,149 +0,0 @@ -/* - * arch/arm/mach-lh7a40x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for LH7A40x platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include <mach/hardware.h> -#include <mach/irqs.h> - -/* In order to allow there to be support for both of the processor - classes at the same time, we make a hack here that isn't very - pretty. At startup, the link pointed to with the - branch_irq_lh7a400 symbol is replaced with a NOP when the CPU is - detected as a lh7a404. - - *** FIXME: we should clean this up so that there is only one - implementation for each CPU's design. - -*/ - -#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - -branch_irq_lh7a400: b 1000f - -@ Implementation of the LH7A404 get_irqnr_and_base. - - mov \irqnr, #0 @ VIC1 irq base - mov \base, #io_p2v(0x80000000) @ APB registers - add \base, \base, #0x8000 - ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 - ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS - bne 1001f - add \base, \base, #(0xa000 - 0x8000) - ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS - mov \irqnr, #32 @ VIC2 irq base - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits -1008: movs \irqstat, #1 @ Force !Z - str \tmp, [\base, #0x0030] @ Clear vector - b 1009f - -@ Implementation of the LH7A400 get_irqnr_and_base. - -1000: mov \irqnr, #0 - mov \base, #io_p2v(0x80000000) @ APB registers - ldr \irqstat, [\base, #0x500] @ PIC INTSR - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1008: movs \irqstat, #1 @ Force !Z - -1009: - .endm - - - -#elif defined (CONFIG_ARCH_LH7A400) - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqnr, #0 - mov \base, #io_p2v(0x80000000) @ APB registers - ldr \irqstat, [\base, #0x500] @ PIC INTSR - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1008: movs \irqstat, #1 @ Force !Z -1009: - .endm - -#elif defined(CONFIG_ARCH_LH7A404) - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqnr, #0 @ VIC1 irq base - mov \base, #io_p2v(0x80000000) @ APB registers - add \base, \base, #0x8000 - ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 - ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS - bne 1001f - add \base, \base, #(0xa000 - 0x8000) - ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS - mov \irqnr, #32 @ VIC2 irq base - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits -1008: movs \irqstat, #1 @ Force !Z - str \tmp, [\base, #0x0030] @ Clear vector -1009: - .endm -#endif - - diff --git a/arch/arm/mach-lh7a40x/include/mach/hardware.h b/arch/arm/mach-lh7a40x/include/mach/hardware.h deleted file mode 100644 index 59d2ace35217..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/hardware.h +++ /dev/null @@ -1,62 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/hardware.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * [ Substantially cribbed from arch/arm/mach-pxa/include/mach/hardware.h ] - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/sizes.h> /* Added for the sake of amba-clcd driver */ - -#define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff)) -#define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff)) - -#ifdef __ASSEMBLY__ - -# define __REG(x) io_p2v(x) -# define __PREG(x) io_v2p(x) - -#else - -# if 0 -# define __REG(x) (*((volatile u32 *)io_p2v(x))) -# else -/* - * This __REG() version gives the same results as the one above, except - * that we are fooling gcc somehow so it generates far better and smaller - * assembly code for access to contiguous registers. It's a shame that gcc - * doesn't guess this by itself. - */ -#include <asm/types.h> -typedef struct { volatile u32 offset[4096]; } __regbase; -# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] -# define __REG(x) __REGP(io_p2v(x)) -typedef struct { volatile u16 offset[4096]; } __regbase16; -# define __REGP16(x) ((__regbase16 *)((x)&~4095))->offset[((x)&4095)>>1] -# define __REG16(x) __REGP16(io_p2v(x)) -typedef struct { volatile u8 offset[4096]; } __regbase8; -# define __REGP8(x) ((__regbase8 *)((x)&~4095))->offset[(x)&4095] -# define __REG8(x) __REGP8(io_p2v(x)) -#endif - -/* Let's kick gcc's ass again... */ -# define __REG2(x,y) \ - ( __builtin_constant_p(y) ? (__REG((x) + (y))) \ - : (*(volatile u32 *)((u32)&__REG(x) + (y))) ) - -# define __PREG(x) (io_v2p((u32)&(x))) - -#endif - -#define MASK_AND_SET(v,m,s) (v) = ((v)&~(m))|(s) - -#include "registers.h" - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-lh7a40x/include/mach/io.h b/arch/arm/mach-lh7a40x/include/mach/io.h deleted file mode 100644 index 6ece45911cbc..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/io.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* No ISA or PCI bus on this machine. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) - -#endif /* __ASM_ARCH_IO_H */ diff --git a/arch/arm/mach-lh7a40x/include/mach/irqs.h b/arch/arm/mach-lh7a40x/include/mach/irqs.h deleted file mode 100644 index 0f9b83675935..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/irqs.h +++ /dev/null @@ -1,200 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/irqs.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -/* It is to be seen whether or not we can build a kernel for more than - * one board. For the time being, these macros assume that we cannot. - * Thus, it is OK to ifdef machine/board specific IRQ assignments. - */ - - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - - -#define FIQ_START 80 - -#if defined (CONFIG_ARCH_LH7A400) - - /* FIQs */ - -# define IRQ_GPIO0FIQ 0 /* GPIO External FIQ Interrupt on F0 */ -# define IRQ_BLINT 1 /* Battery Low */ -# define IRQ_WEINT 2 /* Watchdog Timer, WDT overflow */ -# define IRQ_MCINT 3 /* Media Change, MEDCHG pin rising */ - - /* IRQs */ - -# define IRQ_CSINT 4 /* Audio Codec (ACI) */ -# define IRQ_GPIO1INTR 5 /* GPIO External IRQ Interrupt on F1 */ -# define IRQ_GPIO2INTR 6 /* GPIO External IRQ Interrupt on F2 */ -# define IRQ_GPIO3INTR 7 /* GPIO External IRQ Interrupt on F3 */ -# define IRQ_T1UI 8 /* Timer 1 underflow */ -# define IRQ_T2UI 9 /* Timer 2 underflow */ -# define IRQ_RTCMI 10 -# define IRQ_TINTR 11 /* Clock State Controller 64 Hz tick (CSC) */ -# define IRQ_UART1INTR 12 -# define IRQ_UART2INTR 13 -# define IRQ_LCDINTR 14 -# define IRQ_SSIEOT 15 /* Synchronous Serial Interface (SSI) */ -# define IRQ_UART3INTR 16 -# define IRQ_SCIINTR 17 /* Smart Card Interface (SCI) */ -# define IRQ_AACINTR 18 /* Advanced Audio Codec (AAC) */ -# define IRQ_MMCINTR 19 /* Multimedia Card (MMC) */ -# define IRQ_USBINTR 20 -# define IRQ_DMAINTR 21 -# define IRQ_T3UI 22 /* Timer 3 underflow */ -# define IRQ_GPIO4INTR 23 /* GPIO External IRQ Interrupt on F4 */ -# define IRQ_GPIO5INTR 24 /* GPIO External IRQ Interrupt on F5 */ -# define IRQ_GPIO6INTR 25 /* GPIO External IRQ Interrupt on F6 */ -# define IRQ_GPIO7INTR 26 /* GPIO External IRQ Interrupt on F7 */ -# define IRQ_BMIINTR 27 /* Battery Monitor Interface (BMI) */ - -# define NR_IRQ_CPU 28 /* IRQs directly recognized by CPU */ - - /* Given IRQ, return GPIO interrupt number 0-7 */ -# define IRQ_TO_GPIO(i) ((i) \ - - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\ - - (((i) > IRQ_GPIO0INTR) ? IRQ_GPIO1INTR - IRQ_GPIO0INTR - 1 : 0)) - -#endif - -#if defined (CONFIG_ARCH_LH7A404) - -# define IRQ_BROWN 0 /* Brownout */ -# define IRQ_WDTINTR 1 /* Watchdog Timer */ -# define IRQ_COMMRX 2 /* ARM Comm Rx for Debug */ -# define IRQ_COMMTX 3 /* ARM Comm Tx for Debug */ -# define IRQ_T1UI 4 /* Timer 1 underflow */ -# define IRQ_T2UI 5 /* Timer 2 underflow */ -# define IRQ_CSINT 6 /* Codec Interrupt (shared by AAC on 404) */ -# define IRQ_DMAM2P0 7 /* -- DMA Memory to Peripheral */ -# define IRQ_DMAM2P1 8 -# define IRQ_DMAM2P2 9 -# define IRQ_DMAM2P3 10 -# define IRQ_DMAM2P4 11 -# define IRQ_DMAM2P5 12 -# define IRQ_DMAM2P6 13 -# define IRQ_DMAM2P7 14 -# define IRQ_DMAM2P8 15 -# define IRQ_DMAM2P9 16 -# define IRQ_DMAM2M0 17 /* -- DMA Memory to Memory */ -# define IRQ_DMAM2M1 18 -# define IRQ_GPIO0INTR 19 /* -- GPIOF Interrupt */ -# define IRQ_GPIO1INTR 20 -# define IRQ_GPIO2INTR 21 -# define IRQ_GPIO3INTR 22 -# define IRQ_SOFT_V1_23 23 /* -- Unassigned */ -# define IRQ_SOFT_V1_24 24 -# define IRQ_SOFT_V1_25 25 -# define IRQ_SOFT_V1_26 26 -# define IRQ_SOFT_V1_27 27 -# define IRQ_SOFT_V1_28 28 -# define IRQ_SOFT_V1_29 29 -# define IRQ_SOFT_V1_30 30 -# define IRQ_SOFT_V1_31 31 - -# define IRQ_BLINT 32 /* Battery Low */ -# define IRQ_BMIINTR 33 /* Battery Monitor */ -# define IRQ_MCINTR 34 /* Media Change */ -# define IRQ_TINTR 35 /* 64Hz Tick */ -# define IRQ_WEINT 36 /* Watchdog Expired */ -# define IRQ_RTCMI 37 /* Real-time Clock Match */ -# define IRQ_UART1INTR 38 /* UART1 Interrupt (including error) */ -# define IRQ_UART1ERR 39 /* UART1 Error */ -# define IRQ_UART2INTR 40 /* UART2 Interrupt (including error) */ -# define IRQ_UART2ERR 41 /* UART2 Error */ -# define IRQ_UART3INTR 42 /* UART3 Interrupt (including error) */ -# define IRQ_UART3ERR 43 /* UART3 Error */ -# define IRQ_SCIINTR 44 /* Smart Card */ -# define IRQ_TSCINTR 45 /* Touchscreen */ -# define IRQ_KMIINTR 46 /* Keyboard/Mouse (PS/2) */ -# define IRQ_GPIO4INTR 47 /* -- GPIOF Interrupt */ -# define IRQ_GPIO5INTR 48 -# define IRQ_GPIO6INTR 49 -# define IRQ_GPIO7INTR 50 -# define IRQ_T3UI 51 /* Timer 3 underflow */ -# define IRQ_LCDINTR 52 /* LCD Controller */ -# define IRQ_SSPINTR 53 /* Synchronous Serial Port */ -# define IRQ_SDINTR 54 /* Secure Digital Port (MMC) */ -# define IRQ_USBINTR 55 /* USB Device Port */ -# define IRQ_USHINTR 56 /* USB Host Port */ -# define IRQ_SOFT_V2_25 57 /* -- Unassigned */ -# define IRQ_SOFT_V2_26 58 -# define IRQ_SOFT_V2_27 59 -# define IRQ_SOFT_V2_28 60 -# define IRQ_SOFT_V2_29 61 -# define IRQ_SOFT_V2_30 62 -# define IRQ_SOFT_V2_31 63 - -# define NR_IRQ_CPU 64 /* IRQs directly recognized by CPU */ - - /* Given IRQ, return GPIO interrupt number 0-7 */ -# define IRQ_TO_GPIO(i) ((i) \ - - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\ - - IRQ_GPIO0INTR) - - /* Vector Address constants */ -# define VA_VECTORED 0x100 /* Set for vectored interrupt */ -# define VA_VIC1DEFAULT 0x200 /* Set as default VECTADDR for VIC1 */ -# define VA_VIC2DEFAULT 0x400 /* Set as default VECTADDR for VIC2 */ - -#endif - - /* IRQ aliases */ - -#if !defined (IRQ_GPIO0INTR) -# define IRQ_GPIO0INTR IRQ_GPIO0FIQ -#endif -#define IRQ_TICK IRQ_TINTR -#define IRQ_PCC1_RDY IRQ_GPIO6INTR /* PCCard 1 ready */ -#define IRQ_PCC2_RDY IRQ_GPIO7INTR /* PCCard 2 ready */ -#define IRQ_USB IRQ_USBINTR /* USB device */ - -#ifdef CONFIG_MACH_KEV7A400 -# define IRQ_TS IRQ_GPIOFIQ /* Touchscreen */ -# define IRQ_CPLD IRQ_GPIO1INTR /* CPLD cascade */ -# define IRQ_PCC1_CD IRQ_GPIO_F2 /* PCCard 1 card detect */ -# define IRQ_PCC2_CD IRQ_GPIO_F3 /* PCCard 2 card detect */ -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define IRQ_CPLD_V28 IRQ_GPIO7INTR /* CPLD cascade through GPIO_PF7 */ -# define IRQ_CPLD_V34 IRQ_GPIO3INTR /* CPLD cascade through GPIO_PF3 */ -#endif - - /* System specific IRQs */ - -#define IRQ_BOARD_START NR_IRQ_CPU - -#ifdef CONFIG_MACH_KEV7A400 -# define IRQ_KEV7A400_CPLD IRQ_BOARD_START -# define NR_IRQ_BOARD 5 -# define IRQ_KEV7A400_MMC_CD IRQ_KEV7A400_CPLD + 0 /* MMC Card Detect */ -# define IRQ_KEV7A400_RI2 IRQ_KEV7A400_CPLD + 1 /* Ring Indicator 2 */ -# define IRQ_KEV7A400_IDE_CF IRQ_KEV7A400_CPLD + 2 /* Compact Flash (?) */ -# define IRQ_KEV7A400_ETH_INT IRQ_KEV7A400_CPLD + 3 /* Ethernet chip */ -# define IRQ_KEV7A400_INT IRQ_KEV7A400_CPLD + 4 -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define IRQ_LPD7A40X_CPLD IRQ_BOARD_START -# define NR_IRQ_BOARD 2 -# define IRQ_LPD7A40X_ETH_INT IRQ_LPD7A40X_CPLD + 0 /* Ethernet chip */ -# define IRQ_LPD7A400_TS IRQ_LPD7A40X_CPLD + 1 /* Touch screen */ -#endif - -#if defined (CONFIG_MACH_LPD7A400) -# define IRQ_TOUCH IRQ_LPD7A400_TS -#endif - -#define NR_IRQS (NR_IRQ_CPU + NR_IRQ_BOARD) - -#endif diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h deleted file mode 100644 index edb8f5faf5d5..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/memory.h +++ /dev/null @@ -1,28 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/memory.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * - * Refer to <file:Documentation/arm/Sharp-LH/SDRAM> for more information. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0xc0000000) - -/* - * Sparsemem version of the above - */ -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 24 - -#endif diff --git a/arch/arm/mach-lh7a40x/include/mach/registers.h b/arch/arm/mach-lh7a40x/include/mach/registers.h deleted file mode 100644 index ea44396383a7..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/registers.h +++ /dev/null @@ -1,224 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/registers.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <mach/constants.h> - -#ifndef __ASM_ARCH_REGISTERS_H -#define __ASM_ARCH_REGISTERS_H - - - /* Physical register base addresses */ - -#define AC97C_PHYS (0x80000000) /* AC97 Controller */ -#define MMC_PHYS (0x80000100) /* Multimedia Card Controller */ -#define USB_PHYS (0x80000200) /* USB Client */ -#define SCI_PHYS (0x80000300) /* Secure Card Interface */ -#define CSC_PHYS (0x80000400) /* Clock/State Controller */ -#define INTC_PHYS (0x80000500) /* Interrupt Controller */ -#define UART1_PHYS (0x80000600) /* UART1 Controller */ -#define SIR_PHYS (0x80000600) /* IR Controller, same are UART1 */ -#define UART2_PHYS (0x80000700) /* UART2 Controller */ -#define UART3_PHYS (0x80000800) /* UART3 Controller */ -#define DCDC_PHYS (0x80000900) /* DC to DC Controller */ -#define ACI_PHYS (0x80000a00) /* Audio Codec Interface */ -#define SSP_PHYS (0x80000b00) /* Synchronous ... */ -#define TIMER_PHYS (0x80000c00) /* Timer Controller */ -#define RTC_PHYS (0x80000d00) /* Real-time Clock */ -#define GPIO_PHYS (0x80000e00) /* General Purpose IO */ -#define BMI_PHYS (0x80000f00) /* Battery Monitor Interface */ -#define HRTFTC_PHYS (0x80001000) /* High-res TFT Controller (LH7A400) */ -#define ALI_PHYS (0x80001000) /* Advanced LCD Interface (LH7A404) */ -#define WDT_PHYS (0x80001400) /* Watchdog Timer */ -#define SMC_PHYS (0x80002000) /* Static Memory Controller */ -#define SDRC_PHYS (0x80002400) /* SDRAM Controller */ -#define DMAC_PHYS (0x80002800) /* DMA Controller */ -#define CLCDC_PHYS (0x80003000) /* Color LCD Controller */ - - /* Physical registers of the LH7A404 */ - -#define ADC_PHYS (0x80001300) /* A/D & Touchscreen Controller */ -#define VIC1_PHYS (0x80008000) /* Vectored Interrupt Controller 1 */ -#define USBH_PHYS (0x80009000) /* USB OHCI host controller */ -#define VIC2_PHYS (0x8000a000) /* Vectored Interrupt Controller 2 */ - -/*#define KBD_PHYS (0x80000e00) */ -/*#define LCDICP_PHYS (0x80001000) */ - - - /* Clock/State Controller register */ - -#define CSC_PWRSR __REG(CSC_PHYS + 0x00) /* Reset register & ID */ -#define CSC_PWRCNT __REG(CSC_PHYS + 0x04) /* Power control */ -#define CSC_CLKSET __REG(CSC_PHYS + 0x20) /* Clock speed control */ -#define CSC_USBDRESET __REG(CSC_PHYS + 0x4c) /* USB Device resets */ - -#define CSC_PWRCNT_USBH_EN (1<<28) /* USB Host power enable */ -#define CSC_PWRCNT_DMAC_M2M1_EN (1<<27) -#define CSC_PWRCNT_DMAC_M2M0_EN (1<<26) -#define CSC_PWRCNT_DMAC_M2P8_EN (1<<25) -#define CSC_PWRCNT_DMAC_M2P9_EN (1<<24) -#define CSC_PWRCNT_DMAC_M2P6_EN (1<<23) -#define CSC_PWRCNT_DMAC_M2P7_EN (1<<22) -#define CSC_PWRCNT_DMAC_M2P4_EN (1<<21) -#define CSC_PWRCNT_DMAC_M2P5_EN (1<<20) -#define CSC_PWRCNT_DMAC_M2P2_EN (1<<19) -#define CSC_PWRCNT_DMAC_M2P3_EN (1<<18) -#define CSC_PWRCNT_DMAC_M2P0_EN (1<<17) -#define CSC_PWRCNT_DMAC_M2P1_EN (1<<16) - -#define CSC_PWRSR_CHIPMAN_SHIFT (24) -#define CSC_PWRSR_CHIPMAN_MASK (0xff) -#define CSC_PWRSR_CHIPID_SHIFT (16) -#define CSC_PWRSR_CHIPID_MASK (0xff) - -#define CSC_USBDRESET_APBRESETREG (1<<1) -#define CSC_USBDRESET_IORESETREG (1<<0) - - /* Interrupt Controller registers */ - -#define INTC_INTSR __REG(INTC_PHYS + 0x00) /* Status */ -#define INTC_INTRSR __REG(INTC_PHYS + 0x04) /* Raw Status */ -#define INTC_INTENS __REG(INTC_PHYS + 0x08) /* Enable Set */ -#define INTC_INTENC __REG(INTC_PHYS + 0x0c) /* Enable Clear */ - - - /* Vectored Interrupted Controller registers */ - -#define VIC1_IRQSTATUS __REG(VIC1_PHYS + 0x00) -#define VIC1_FIQSTATUS __REG(VIC1_PHYS + 0x04) -#define VIC1_RAWINTR __REG(VIC1_PHYS + 0x08) -#define VIC1_INTSEL __REG(VIC1_PHYS + 0x0c) -#define VIC1_INTEN __REG(VIC1_PHYS + 0x10) -#define VIC1_INTENCLR __REG(VIC1_PHYS + 0x14) -#define VIC1_SOFTINT __REG(VIC1_PHYS + 0x18) -#define VIC1_SOFTINTCLR __REG(VIC1_PHYS + 0x1c) -#define VIC1_PROTECT __REG(VIC1_PHYS + 0x20) -#define VIC1_VECTADDR __REG(VIC1_PHYS + 0x30) -#define VIC1_NVADDR __REG(VIC1_PHYS + 0x34) -#define VIC1_VAD0 __REG(VIC1_PHYS + 0x100) -#define VIC1_VECTCNTL0 __REG(VIC1_PHYS + 0x200) -#define VIC2_IRQSTATUS __REG(VIC2_PHYS + 0x00) -#define VIC2_FIQSTATUS __REG(VIC2_PHYS + 0x04) -#define VIC2_RAWINTR __REG(VIC2_PHYS + 0x08) -#define VIC2_INTSEL __REG(VIC2_PHYS + 0x0c) -#define VIC2_INTEN __REG(VIC2_PHYS + 0x10) -#define VIC2_INTENCLR __REG(VIC2_PHYS + 0x14) -#define VIC2_SOFTINT __REG(VIC2_PHYS + 0x18) -#define VIC2_SOFTINTCLR __REG(VIC2_PHYS + 0x1c) -#define VIC2_PROTECT __REG(VIC2_PHYS + 0x20) -#define VIC2_VECTADDR __REG(VIC2_PHYS + 0x30) -#define VIC2_NVADDR __REG(VIC2_PHYS + 0x34) -#define VIC2_VAD0 __REG(VIC2_PHYS + 0x100) -#define VIC2_VECTCNTL0 __REG(VIC2_PHYS + 0x200) - -#define VIC_CNTL_ENABLE (0x20) - - /* USB Host registers (Open HCI compatible) */ - -#define USBH_CMDSTATUS __REG(USBH_PHYS + 0x08) - - - /* GPIO registers */ - -#define GPIO_INTTYPE1 __REG(GPIO_PHYS + 0x4c) /* Interrupt Type 1 (Edge) */ -#define GPIO_INTTYPE2 __REG(GPIO_PHYS + 0x50) /* Interrupt Type 2 */ -#define GPIO_GPIOFEOI __REG(GPIO_PHYS + 0x54) /* GPIO End-of-Interrupt */ -#define GPIO_GPIOINTEN __REG(GPIO_PHYS + 0x58) /* GPIO Interrupt Enable */ -#define GPIO_INTSTATUS __REG(GPIO_PHYS + 0x5c) /* GPIO Interrupt Status */ -#define GPIO_PINMUX __REG(GPIO_PHYS + 0x2c) -#define GPIO_PADD __REG(GPIO_PHYS + 0x10) -#define GPIO_PAD __REG(GPIO_PHYS + 0x00) -#define GPIO_PCD __REG(GPIO_PHYS + 0x08) -#define GPIO_PCDD __REG(GPIO_PHYS + 0x18) -#define GPIO_PEDD __REG(GPIO_PHYS + 0x24) -#define GPIO_PED __REG(GPIO_PHYS + 0x20) - - - /* Static Memory Controller registers */ - -#define SMC_BCR0 __REG(SMC_PHYS + 0x00) /* Bank 0 Configuration */ -#define SMC_BCR1 __REG(SMC_PHYS + 0x04) /* Bank 1 Configuration */ -#define SMC_BCR2 __REG(SMC_PHYS + 0x08) /* Bank 2 Configuration */ -#define SMC_BCR3 __REG(SMC_PHYS + 0x0C) /* Bank 3 Configuration */ -#define SMC_BCR6 __REG(SMC_PHYS + 0x18) /* Bank 6 Configuration */ -#define SMC_BCR7 __REG(SMC_PHYS + 0x1c) /* Bank 7 Configuration */ - - -#ifdef CONFIG_MACH_KEV7A400 -# define CPLD_RD_OPT_DIP_SW __REG16(CPLD_PHYS + 0x00) /* Read Option SW */ -# define CPLD_WR_IO_BRD_CTL __REG16(CPLD_PHYS + 0x00) /* Write Control */ -# define CPLD_RD_PB_KEYS __REG16(CPLD_PHYS + 0x02) /* Read Btn Keys */ -# define CPLD_LATCHED_INTS __REG16(CPLD_PHYS + 0x04) /* Read INTR stat. */ -# define CPLD_CL_INT __REG16(CPLD_PHYS + 0x04) /* Clear INTR stat */ -# define CPLD_BOOT_MMC_STATUS __REG16(CPLD_PHYS + 0x06) /* R/O */ -# define CPLD_RD_KPD_ROW_SENSE __REG16(CPLD_PHYS + 0x08) -# define CPLD_WR_PB_INT_MASK __REG16(CPLD_PHYS + 0x08) -# define CPLD_RD_BRD_DISP_SW __REG16(CPLD_PHYS + 0x0a) -# define CPLD_WR_EXT_INT_MASK __REG16(CPLD_PHYS + 0x0a) -# define CPLD_LCD_PWR_CNTL __REG16(CPLD_PHYS + 0x0c) -# define CPLD_SEVEN_SEG __REG16(CPLD_PHYS + 0x0e) /* 7 seg. LED mask */ - -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) - -# define CPLD_CONTROL __REG16(CPLD02_PHYS) -# define CPLD_SPI_DATA __REG16(CPLD06_PHYS) -# define CPLD_SPI_CONTROL __REG16(CPLD08_PHYS) -# define CPLD_SPI_EEPROM __REG16(CPLD0A_PHYS) -# define CPLD_INTERRUPTS __REG16(CPLD0C_PHYS) /* IRQ mask/status */ -# define CPLD_BOOT_MODE __REG16(CPLD0E_PHYS) -# define CPLD_FLASH __REG16(CPLD10_PHYS) -# define CPLD_POWER_MGMT __REG16(CPLD12_PHYS) -# define CPLD_REVISION __REG16(CPLD14_PHYS) -# define CPLD_GPIO_EXT __REG16(CPLD16_PHYS) -# define CPLD_GPIO_DATA __REG16(CPLD18_PHYS) -# define CPLD_GPIO_DIR __REG16(CPLD1A_PHYS) - -#endif - - /* Timer registers */ - -#define TIMER_LOAD1 __REG(TIMER_PHYS + 0x00) /* Timer 1 initial value */ -#define TIMER_VALUE1 __REG(TIMER_PHYS + 0x04) /* Timer 1 current value */ -#define TIMER_CONTROL1 __REG(TIMER_PHYS + 0x08) /* Timer 1 control word */ -#define TIMER_EOI1 __REG(TIMER_PHYS + 0x0c) /* Timer 1 interrupt clear */ - -#define TIMER_LOAD2 __REG(TIMER_PHYS + 0x20) /* Timer 2 initial value */ -#define TIMER_VALUE2 __REG(TIMER_PHYS + 0x24) /* Timer 2 current value */ -#define TIMER_CONTROL2 __REG(TIMER_PHYS + 0x28) /* Timer 2 control word */ -#define TIMER_EOI2 __REG(TIMER_PHYS + 0x2c) /* Timer 2 interrupt clear */ - -#define TIMER_BUZZCON __REG(TIMER_PHYS + 0x40) /* Buzzer configuration */ - -#define TIMER_LOAD3 __REG(TIMER_PHYS + 0x80) /* Timer 3 initial value */ -#define TIMER_VALUE3 __REG(TIMER_PHYS + 0x84) /* Timer 3 current value */ -#define TIMER_CONTROL3 __REG(TIMER_PHYS + 0x88) /* Timer 3 control word */ -#define TIMER_EOI3 __REG(TIMER_PHYS + 0x8c) /* Timer 3 interrupt clear */ - -#define TIMER_C_ENABLE (1<<7) -#define TIMER_C_PERIODIC (1<<6) -#define TIMER_C_FREERUNNING (0) -#define TIMER_C_2KHZ (0x00) /* 1.986 kHz */ -#define TIMER_C_508KHZ (0x08) - - /* GPIO registers */ - -#define GPIO_PFDD __REG(GPIO_PHYS + 0x34) /* PF direction */ -#define GPIO_INTTYPE1 __REG(GPIO_PHYS + 0x4c) /* IRQ edge or lvl */ -#define GPIO_INTTYPE2 __REG(GPIO_PHYS + 0x50) /* IRQ activ hi/lo */ -#define GPIO_GPIOFEOI __REG(GPIO_PHYS + 0x54) /* GPIOF end of IRQ */ -#define GPIO_GPIOFINTEN __REG(GPIO_PHYS + 0x58) /* GPIOF IRQ enable */ -#define GPIO_INTSTATUS __REG(GPIO_PHYS + 0x5c) /* GPIOF IRQ latch */ -#define GPIO_RAWINTSTATUS __REG(GPIO_PHYS + 0x60) /* GPIOF IRQ raw */ - - -#endif /* _ASM_ARCH_REGISTERS_H */ diff --git a/arch/arm/mach-lh7a40x/include/mach/ssp.h b/arch/arm/mach-lh7a40x/include/mach/ssp.h deleted file mode 100644 index 509916182e34..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/ssp.h +++ /dev/null @@ -1,70 +0,0 @@ -/* ssp.h - - written by Marc Singer - 6 Dec 2004 - - Copyright (C) 2004 Marc Singer - - ----------- - DESCRIPTION - ----------- - - This SSP header is available throughout the kernel, for this - machine/architecture, because drivers that use it may be dispersed. - - This file was cloned from the 7952x implementation. It would be - better to share them, but we're taking an easier approach for the - time being. - -*/ - -#if !defined (__SSP_H__) -# define __SSP_H__ - -/* ----- Includes */ - -/* ----- Types */ - -struct ssp_driver { - int (*init) (void); - void (*exit) (void); - void (*acquire) (void); - void (*release) (void); - int (*configure) (int device, int mode, int speed, - int frame_size_write, int frame_size_read); - void (*chip_select) (int enable); - void (*set_callbacks) (void* handle, - irqreturn_t (*callback_tx)(void*), - irqreturn_t (*callback_rx)(void*)); - void (*enable) (void); - void (*disable) (void); -// int (*save_state) (void*); -// void (*restore_state) (void*); - int (*read) (void); - int (*write) (u16 data); - int (*write_read) (u16 data); - void (*flush) (void); - void (*write_async) (void* pv, size_t cb); - size_t (*write_pos) (void); -}; - - /* These modes are only available on the LH79524 */ -#define SSP_MODE_SPI (1) -#define SSP_MODE_SSI (2) -#define SSP_MODE_MICROWIRE (3) -#define SSP_MODE_I2S (4) - - /* CPLD SPI devices */ -#define DEVICE_EEPROM 0 /* Configuration eeprom */ -#define DEVICE_MAC 1 /* MAC eeprom (LPD79524) */ -#define DEVICE_CODEC 2 /* Audio codec */ -#define DEVICE_TOUCH 3 /* Touch screen (LPD79520) */ - -/* ----- Globals */ - -/* ----- Prototypes */ - -//extern struct ssp_driver lh79520_i2s_driver; -extern struct ssp_driver lh7a400_cpld_ssp_driver; - -#endif /* __SSP_H__ */ diff --git a/arch/arm/mach-lh7a40x/include/mach/system.h b/arch/arm/mach-lh7a40x/include/mach/system.h deleted file mode 100644 index 45a56d3b93d7..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/system.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -static inline void arch_idle(void) -{ - cpu_do_idle (); -} - -static inline void arch_reset(char mode, const char *cmd) -{ - cpu_reset (0); -} diff --git a/arch/arm/mach-lh7a40x/include/mach/timex.h b/arch/arm/mach-lh7a40x/include/mach/timex.h deleted file mode 100644 index 08028cef1b3b..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/timex.h +++ /dev/null @@ -1,17 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/timex.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <mach/constants.h> - -#define CLOCK_TICK_RATE (PLL_CLOCK/6/16) - -/* -#define CLOCK_TICK_RATE 3686400 -*/ diff --git a/arch/arm/mach-lh7a40x/include/mach/uncompress.h b/arch/arm/mach-lh7a40x/include/mach/uncompress.h deleted file mode 100644 index 55b80d479eb4..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/uncompress.h +++ /dev/null @@ -1,38 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/uncompress.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <mach/registers.h> - -#ifndef UART_R_DATA -# define UART_R_DATA (0x00) -#endif -#ifndef UART_R_STATUS -# define UART_R_STATUS (0x10) -#endif -#define nTxRdy (0x20) /* Not TxReady (literally Tx FIFO full) */ - - /* Access UART with physical addresses before MMU is setup */ -#define UART_STATUS (*(volatile unsigned long*) (UART2_PHYS + UART_R_STATUS)) -#define UART_DATA (*(volatile unsigned long*) (UART2_PHYS + UART_R_DATA)) - -static inline void putc(int ch) -{ - while (UART_STATUS & nTxRdy) - barrier(); - UART_DATA = ch; -} - -static inline void flush(void) -{ -} - - /* NULL functions; we don't presently need them */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/arch/arm/mach-lh7a40x/include/mach/vmalloc.h b/arch/arm/mach-lh7a40x/include/mach/vmalloc.h deleted file mode 100644 index d62da7358b16..000000000000 --- a/arch/arm/mach-lh7a40x/include/mach/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* arch/arm/mach-lh7a40x/include/mach/vmalloc.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ -#define VMALLOC_END (0xe8000000UL) diff --git a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c deleted file mode 100644 index c7433b3c5812..000000000000 --- a/arch/arm/mach-lh7a40x/irq-kev7a400.c +++ /dev/null @@ -1,93 +0,0 @@ -/* arch/arm/mach-lh7a40x/irq-kev7a400.c - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/interrupt.h> -#include <linux/init.h> - -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <asm/mach/hardware.h> -#include <asm/mach/irqs.h> - -#include "common.h" - - /* KEV7a400 CPLD IRQ handling */ - -static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ - -static void -lh7a400_ack_cpld_irq (u32 irq) -{ - CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); -} - -static void -lh7a400_mask_cpld_irq (u32 irq) -{ - CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); - CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; -} - -static void -lh7a400_unmask_cpld_irq (u32 irq) -{ - CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); - CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; -} - -static struct -irq_chip lh7a400_cpld_chip = { - .name = "CPLD", - .ack = lh7a400_ack_cpld_irq, - .mask = lh7a400_mask_cpld_irq, - .unmask = lh7a400_unmask_cpld_irq, -}; - -static void -lh7a400_cpld_handler (unsigned int irq, struct irq_desc *desc) -{ - u32 mask = CPLD_LATCHED_INTS; - irq = IRQ_KEV_7A400_CPLD; - for (; mask; mask >>= 1, ++irq) { - if (mask & 1) - desc[irq].handle (irq, desc); - } -} - - /* IRQ initialization */ - -void __init -lh7a400_init_board_irq (void) -{ - int irq; - - for (irq = IRQ_KEV7A400_CPLD; - irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) { - set_irq_chip (irq, &lh7a400_cpld_chip); - set_irq_handler (irq, handle_edge_irq); - set_irq_flags (irq, IRQF_VALID); - } - set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler); - - /* Clear all CPLD interrupts */ - CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */ - - /* *** FIXME CF enabled in ide-probe.c */ - - GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */ - barrier(); - GPIO_INTTYPE1 - = (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */ - GPIO_INTTYPE2 = 0; /* Falling edge & low-level */ - GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */ - GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */ - - init_FIQ(); -} diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c deleted file mode 100644 index f2e7e655ca35..000000000000 --- a/arch/arm/mach-lh7a40x/irq-lh7a400.c +++ /dev/null @@ -1,91 +0,0 @@ -/* arch/arm/mach-lh7a40x/irq-lh7a400.c - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> - -#include <mach/hardware.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <mach/irqs.h> - -#include "common.h" - - /* CPU IRQ handling */ - -static void lh7a400_mask_irq(struct irq_data *d) -{ - INTC_INTENC = (1 << d->irq); -} - -static void lh7a400_unmask_irq(struct irq_data *d) -{ - INTC_INTENS = (1 << d->irq); -} - -static void lh7a400_ack_gpio_irq(struct irq_data *d) -{ - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); - INTC_INTENC = (1 << d->irq); -} - -static struct irq_chip lh7a400_internal_chip = { - .name = "MPU", - .irq_ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ - .irq_mask = lh7a400_mask_irq, - .irq_unmask = lh7a400_unmask_irq, -}; - -static struct irq_chip lh7a400_gpio_chip = { - .name = "GPIO", - .irq_ack = lh7a400_ack_gpio_irq, - .irq_mask = lh7a400_mask_irq, - .irq_unmask = lh7a400_unmask_irq, -}; - - - /* IRQ initialization */ - -void __init lh7a400_init_irq (void) -{ - int irq; - - INTC_INTENC = 0xffffffff; /* Disable all interrupts */ - GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */ - barrier (); - - for (irq = 0; irq < NR_IRQS; ++irq) { - switch (irq) { - case IRQ_GPIO0INTR: - case IRQ_GPIO1INTR: - case IRQ_GPIO2INTR: - case IRQ_GPIO3INTR: - case IRQ_GPIO4INTR: - case IRQ_GPIO5INTR: - case IRQ_GPIO6INTR: - case IRQ_GPIO7INTR: - set_irq_chip (irq, &lh7a400_gpio_chip); - set_irq_handler (irq, handle_level_irq); /* OK default */ - break; - default: - set_irq_chip (irq, &lh7a400_internal_chip); - set_irq_handler (irq, handle_level_irq); - } - set_irq_flags (irq, IRQF_VALID); - } - - lh7a40x_init_board_irq (); - -/* *** FIXME: the LH7a400 does use FIQ interrupts in some cases. For - the time being, these are not initialized. */ - -/* init_FIQ(); */ -} diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c deleted file mode 100644 index 14b173389573..000000000000 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ /dev/null @@ -1,175 +0,0 @@ -/* arch/arm/mach-lh7a40x/irq-lh7a404.c - * - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> - -#include <mach/hardware.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <mach/irqs.h> - -#include "common.h" - -#define USE_PRIORITIES - -/* See Documentation/arm/Sharp-LH/VectoredInterruptController for more - * information on using the vectored interrupt controller's - * prioritizing feature. */ - -static unsigned char irq_pri_vic1[] = { -#if defined (USE_PRIORITIES) - IRQ_GPIO3INTR, /* CPLD */ - IRQ_DMAM2P4, IRQ_DMAM2P5, /* AC97 */ -#endif -}; -static unsigned char irq_pri_vic2[] = { -#if defined (USE_PRIORITIES) - IRQ_T3UI, /* Timer */ - IRQ_GPIO7INTR, /* CPLD */ - IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR, - IRQ_LCDINTR, /* LCD */ - IRQ_TSCINTR, /* ADC/Touchscreen */ -#endif -}; - - /* CPU IRQ handling */ - -static void lh7a404_vic1_mask_irq(struct irq_data *d) -{ - VIC1_INTENCLR = (1 << d->irq); -} - -static void lh7a404_vic1_unmask_irq(struct irq_data *d) -{ - VIC1_INTEN = (1 << d->irq); -} - -static void lh7a404_vic2_mask_irq(struct irq_data *d) -{ - VIC2_INTENCLR = (1 << (d->irq - 32)); -} - -static void lh7a404_vic2_unmask_irq(struct irq_data *d) -{ - VIC2_INTEN = (1 << (d->irq - 32)); -} - -static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d) -{ - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); - VIC1_INTENCLR = (1 << d->irq); -} - -static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d) -{ - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); - VIC2_INTENCLR = (1 << d->irq); -} - -static struct irq_chip lh7a404_vic1_chip = { - .name = "VIC1", - .irq_ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ - .irq_mask = lh7a404_vic1_mask_irq, - .irq_unmask = lh7a404_vic1_unmask_irq, -}; - -static struct irq_chip lh7a404_vic2_chip = { - .name = "VIC2", - .irq_ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ - .irq_mask = lh7a404_vic2_mask_irq, - .irq_unmask = lh7a404_vic2_unmask_irq, -}; - -static struct irq_chip lh7a404_gpio_vic1_chip = { - .name = "GPIO-VIC1", - .irq_ack = lh7a404_vic1_ack_gpio_irq, - .irq_mask = lh7a404_vic1_mask_irq, - .irq_unmask = lh7a404_vic1_unmask_irq, -}; - -static struct irq_chip lh7a404_gpio_vic2_chip = { - .name = "GPIO-VIC2", - .irq_ack = lh7a404_vic2_ack_gpio_irq, - .irq_mask = lh7a404_vic2_mask_irq, - .irq_unmask = lh7a404_vic2_unmask_irq, -}; - - /* IRQ initialization */ - -#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) -extern void* branch_irq_lh7a400; -#endif - -void __init lh7a404_init_irq (void) -{ - int irq; - -#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) -#define NOP 0xe1a00000 /* mov r0, r0 */ - branch_irq_lh7a400 = NOP; -#endif - - VIC1_INTENCLR = 0xffffffff; - VIC2_INTENCLR = 0xffffffff; - VIC1_INTSEL = 0; /* All IRQs */ - VIC2_INTSEL = 0; /* All IRQs */ - VIC1_NVADDR = VA_VIC1DEFAULT; - VIC2_NVADDR = VA_VIC2DEFAULT; - VIC1_VECTADDR = 0; - VIC2_VECTADDR = 0; - - GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */ - barrier (); - - /* Install prioritized interrupts, if there are any. */ - /* The | 0x20*/ - for (irq = 0; irq < 16; ++irq) { - (&VIC1_VAD0)[irq] - = (irq < ARRAY_SIZE (irq_pri_vic1)) - ? (irq_pri_vic1[irq] | VA_VECTORED) : 0; - (&VIC1_VECTCNTL0)[irq] - = (irq < ARRAY_SIZE (irq_pri_vic1)) - ? (irq_pri_vic1[irq] | VIC_CNTL_ENABLE) : 0; - (&VIC2_VAD0)[irq] - = (irq < ARRAY_SIZE (irq_pri_vic2)) - ? (irq_pri_vic2[irq] | VA_VECTORED) : 0; - (&VIC2_VECTCNTL0)[irq] - = (irq < ARRAY_SIZE (irq_pri_vic2)) - ? (irq_pri_vic2[irq] | VIC_CNTL_ENABLE) : 0; - } - - for (irq = 0; irq < NR_IRQS; ++irq) { - switch (irq) { - case IRQ_GPIO0INTR: - case IRQ_GPIO1INTR: - case IRQ_GPIO2INTR: - case IRQ_GPIO3INTR: - case IRQ_GPIO4INTR: - case IRQ_GPIO5INTR: - case IRQ_GPIO6INTR: - case IRQ_GPIO7INTR: - set_irq_chip (irq, irq < 32 - ? &lh7a404_gpio_vic1_chip - : &lh7a404_gpio_vic2_chip); - set_irq_handler (irq, handle_level_irq); /* OK default */ - break; - default: - set_irq_chip (irq, irq < 32 - ? &lh7a404_vic1_chip - : &lh7a404_vic2_chip); - set_irq_handler (irq, handle_level_irq); - } - set_irq_flags (irq, IRQF_VALID); - } - - lh7a40x_init_board_irq (); -} diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c deleted file mode 100644 index 1bfdcddcb93e..000000000000 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ /dev/null @@ -1,128 +0,0 @@ -/* arch/arm/mach-lh7a40x/irq-lpd7a40x.c - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> - -#include <mach/hardware.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <mach/irqs.h> - -#include "common.h" - -static void lh7a40x_ack_cpld_irq(struct irq_data *d) -{ - /* CPLD doesn't have ack capability */ -} - -static void lh7a40x_mask_cpld_irq(struct irq_data *d) -{ - switch (d->irq) { - case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; - break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8; - break; - } -} - -static void lh7a40x_unmask_cpld_irq(struct irq_data *d) -{ - switch (d->irq) { - case IRQ_LPD7A40X_ETH_INT: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; - break; - case IRQ_LPD7A400_TS: - CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8; - break; - } -} - -static struct irq_chip lh7a40x_cpld_chip = { - .name = "CPLD", - .irq_ack = lh7a40x_ack_cpld_irq, - .irq_mask = lh7a40x_mask_cpld_irq, - .irq_unmask = lh7a40x_unmask_cpld_irq, -}; - -static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) -{ - unsigned int mask = CPLD_INTERRUPTS; - - desc->irq_data.chip->ack (irq); - - if ((mask & 0x1) == 0) /* WLAN */ - generic_handle_irq(IRQ_LPD7A40X_ETH_INT); - - if ((mask & 0x2) == 0) /* Touch */ - generic_handle_irq(IRQ_LPD7A400_TS); - - desc->irq_data.chip->unmask (irq); /* Level-triggered need this */ -} - - - /* IRQ initialization */ - -void __init lh7a40x_init_board_irq (void) -{ - int irq; - - /* Rev A (v2.8): PF0, PF1, PF2, and PF3 are available IRQs. - PF7 supports the CPLD. - Rev B (v3.4): PF0, PF1, and PF2 are available IRQs. - PF3 supports the CPLD. - (Some) LPD7A404 prerelease boards report a version - number of 0x16, but we force an override since the - hardware is of the newer variety. - */ - - unsigned char cpld_version = CPLD_REVISION; - int pinCPLD; - -#if defined CONFIG_MACH_LPD7A404 - cpld_version = 0x34; /* Override, for now */ -#endif - pinCPLD = (cpld_version == 0x28) ? 7 : 3; - - /* First, configure user controlled GPIOF interrupts */ - - GPIO_PFDD &= ~0x0f; /* PF0-3 are inputs */ - GPIO_INTTYPE1 &= ~0x0f; /* PF0-3 are level triggered */ - GPIO_INTTYPE2 &= ~0x0f; /* PF0-3 are active low */ - barrier (); - GPIO_GPIOFINTEN |= 0x0f; /* Enable PF0, PF1, PF2, and PF3 IRQs */ - - /* Then, configure CPLD interrupt */ - - CPLD_INTERRUPTS = 0x0c; /* Disable all CPLD interrupts */ - GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */ - GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */ - GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */ - barrier (); - GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */ - - /* Cascade CPLD interrupts */ - - for (irq = IRQ_BOARD_START; - irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) { - set_irq_chip (irq, &lh7a40x_cpld_chip); - set_irq_handler (irq, handle_edge_irq); - set_irq_flags (irq, IRQF_VALID); - } - - set_irq_chained_handler ((cpld_version == 0x28) - ? IRQ_CPLD_V28 - : IRQ_CPLD_V34, - lh7a40x_cpld_handler); -} diff --git a/arch/arm/mach-lh7a40x/lcd-panel.h b/arch/arm/mach-lh7a40x/lcd-panel.h deleted file mode 100644 index a7f5027b2f78..000000000000 --- a/arch/arm/mach-lh7a40x/lcd-panel.h +++ /dev/null @@ -1,345 +0,0 @@ -/* lcd-panel.h - - written by Marc Singer - 18 Jul 2005 - - Copyright (C) 2005 Marc Singer - - ----------- - DESCRIPTION - ----------- - - Only one panel may be defined at a time. - - The pixel clock is calculated to be no greater than the target. - - Each timing value is accompanied by a specification comment. - - UNITS/MIN/TYP/MAX - - Most of the units will be in clocks. - - USE_RGB555 - - Define this macro to configure the AMBA LCD controller to use an - RGB555 encoding for the pels instead of the normal RGB565. - - LPD9520, LPD79524, LPD7A400, LPD7A404-10, LPD7A404-11 - - These boards are best approximated by 555 for all panels. Some - can use an extra low-order bit of blue in bit 16 of the color - value, but we don't have a way to communicate this non-linear - mapping to the kernel. - -*/ - -#if !defined (__LCD_PANEL_H__) -# define __LCD_PANEL_H__ - -#if defined (MACH_LPD79520)\ - || defined (MACH_LPD79524)\ - || defined (MACH_LPD7A400)\ - || defined (MACH_LPD7A404) -# define USE_RGB555 -#endif - -struct clcd_panel_extra { - unsigned int hrmode; - unsigned int clsen; - unsigned int spsen; - unsigned int pcdel; - unsigned int revdel; - unsigned int lpdel; - unsigned int spldel; - unsigned int pc2del; -}; - -#define NS_TO_CLOCK(ns,c) ((((ns)*((c)/1000) + (1000000 - 1))/1000000)) -#define CLOCK_TO_DIV(e,c) (((c) + (e) - 1)/(e)) - -#if defined CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT - - /* Logic Product Development LCD 3.5" QVGA HRTFT -10 */ - /* Sharp PN LQ035Q7DB02 w/HRTFT controller chip */ - -#define PIX_CLOCK_TARGET (6800000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "3.5in QVGA (LQ035Q7DB02)", - .xres = 240, - .yres = 320, - .pixclock = PIX_CLOCK, - .left_margin = 16, - .right_margin = 21, - .upper_margin = 8, // line/8/8/8 - .lower_margin = 5, - .hsync_len = 61, - .vsync_len = NS_TO_CLOCK (60, PIX_CLOCK), - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IPC | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#define HAS_LCD_PANEL_EXTRA - -static struct clcd_panel_extra lcd_panel_extra = { - .hrmode = 1, - .clsen = 1, - .spsen = 1, - .pcdel = 8, - .revdel = 7, - .lpdel = 13, - .spldel = 77, - .pc2del = 208, -}; - -#endif - -#if defined CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 - - /* Logic Product Development LCD 5.7" QVGA -10 */ - /* Sharp PN LQ057Q3DC02 */ - /* QVGA mode, V/Q=LOW */ - -/* From Sharp on 2006.1.3. I believe some of the values are incorrect - * based on the datasheet. - - Timing0 TIMING1 TIMING2 CONTROL - 0x140A0C4C 0x080504EF 0x013F380D 0x00000829 - HBP= 20 VBP= 8 BCD= 0 - HFP= 10 VFP= 5 CPL=319 - HSW= 12 VSW= 1 IOE= 0 - PPL= 19 LPP=239 IPC= 1 - IHS= 1 - IVS= 1 - ACB= 0 - CSEL= 0 - PCD= 13 - - */ - -/* The full horizontal cycle (Th) is clock/360/400/450. */ -/* The full vertical cycle (Tv) is line/251/262/280. */ - -#define PIX_CLOCK_TARGET (6300000) /* -/6.3/7 MHz */ -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "5.7in QVGA (LQ057Q3DC02)", - .xres = 320, - .yres = 240, - .pixclock = PIX_CLOCK, - .left_margin = 11, - .right_margin = 400-11-320-2, - .upper_margin = 7, // line/7/7/7 - .lower_margin = 262-7-240-2, - .hsync_len = 2, // clk/2/96/200 - .vsync_len = 2, // line/2/-/34 - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - -#if defined CONFIG_FB_ARMCLCD_SHARP_LQ64D343 - - /* Logic Product Development LCD 6.4" VGA -10 */ - /* Sharp PN LQ64D343 */ - -/* The full horizontal cycle (Th) is clock/750/800/900. */ -/* The full vertical cycle (Tv) is line/515/525/560. */ - -#define PIX_CLOCK_TARGET (28330000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "6.4in QVGA (LQ64D343)", - .xres = 640, - .yres = 480, - .pixclock = PIX_CLOCK, - .left_margin = 32, - .right_margin = 800-32-640-96, - .upper_margin = 32, // line/34/34/34 - .lower_margin = 540-32-480-2, - .hsync_len = 96, // clk/2/96/200 - .vsync_len = 2, // line/2/-/34 - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - -#if defined CONFIG_FB_ARMCLCD_SHARP_LQ10D368 - - /* Logic Product Development LCD 10.4" VGA -10 */ - /* Sharp PN LQ10D368 */ - -#define PIX_CLOCK_TARGET (28330000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "10.4in VGA (LQ10D368)", - .xres = 640, - .yres = 480, - .pixclock = PIX_CLOCK, - .left_margin = 21, - .right_margin = 15, - .upper_margin = 34, - .lower_margin = 5, - .hsync_len = 96, - .vsync_len = 16, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - -#if defined CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 - - /* Logic Product Development LCD 12.1" SVGA -10 */ - /* Sharp PN LQ121S1DG41, was LQ121S1DG31 */ - -/* Note that with a 99993900 Hz HCLK, it is not possible to hit the - * target clock frequency range of 35MHz to 42MHz. */ - -/* If the target pixel clock is substantially lower than the panel - * spec, this is done to prevent the LCD display from glitching when - * the CPU is under load. A pixel clock higher than 25MHz - * (empirically determined) will compete with the CPU for bus cycles - * for the Ethernet chip. However, even a pixel clock of 10MHz - * competes with Compact Flash interface during some operations - * (fdisk, e2fsck). And, at that speed the display may have a visible - * flicker. */ - -/* The full horizontal cycle (Th) is clock/832/1056/1395. */ - -#define PIX_CLOCK_TARGET (20000000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "12.1in SVGA (LQ121S1DG41)", - .xres = 800, - .yres = 600, - .pixclock = PIX_CLOCK, - .left_margin = 89, // ns/5/-/(1/PIX_CLOCK)-10 - .right_margin = 1056-800-89-128, - .upper_margin = 23, // line/23/23/23 - .lower_margin = 44, - .hsync_len = 128, // clk/2/128/200 - .vsync_len = 4, // line/2/4/6 - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - -#if defined CONFIG_FB_ARMCLCD_HITACHI - - /* Hitachi*/ - /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */ - -#define PIX_CLOCK_TARGET (49000000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "Hitachi 800x480", - .xres = 800, - .yres = 480, - .pixclock = PIX_CLOCK, - .left_margin = 88, - .right_margin = 40, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 128, - .vsync_len = 2, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - - -#if defined CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE - - /* AU Optotronics A070VW01 7.0 Wide Screen color Display*/ - /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */ - -#define PIX_CLOCK_TARGET (10000000) -#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) -#define PIX_CLOCK (HCLK/PIX_CLOCK_DIVIDER) - -static struct clcd_panel lcd_panel = { - .mode = { - .name = "7.0in Wide (A070VW01)", - .xres = 480, - .yres = 234, - .pixclock = PIX_CLOCK, - .left_margin = 30, - .right_margin = 25, - .upper_margin = 14, - .lower_margin = 12, - .hsync_len = 100, - .vsync_len = 1, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IPC | TIM2_IHS | TIM2_IVS - | (PIX_CLOCK_DIVIDER - 2), - .cntl = CNTL_LCDTFT | CNTL_WATERMARK, - .bpp = 16, -}; - -#endif - -#undef NS_TO_CLOCK -#undef CLOCK_TO_DIV - -#endif /* __LCD_PANEL_H__ */ diff --git a/arch/arm/mach-lh7a40x/ssp-cpld.c b/arch/arm/mach-lh7a40x/ssp-cpld.c deleted file mode 100644 index 2901d49d1484..000000000000 --- a/arch/arm/mach-lh7a40x/ssp-cpld.c +++ /dev/null @@ -1,343 +0,0 @@ -/* arch/arm/mach-lh7a40x/ssp-cpld.c - * - * Copyright (C) 2004,2005 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * SSP/SPI driver for the CardEngine CPLD. - * - */ - -/* NOTES - ----- - - o *** This driver is cribbed from the 7952x implementation. - Some comments may not apply. - - o This driver contains sufficient logic to control either the - serial EEPROMs or the audio codec. It is included in the kernel - to support the codec. The EEPROMs are really the responsibility - of the boot loader and should probably be left alone. - - o The code must be augmented to cope with multiple, simultaneous - clients. - o The audio codec writes to the codec chip whenever playback - starts. - o The touchscreen driver writes to the ads chip every time it - samples. - o The audio codec must write 16 bits, but the touch chip writes - are 8 bits long. - o We need to be able to keep these configurations separate while - simultaneously active. - - */ - -#include <linux/module.h> -#include <linux/kernel.h> -//#include <linux/sched.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -//#include <linux/ioport.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <mach/hardware.h> - -#include <mach/ssp.h> - -//#define TALK - -#if defined (TALK) -#define PRINTK(f...) printk (f) -#else -#define PRINTK(f...) do {} while (0) -#endif - -#if defined (CONFIG_ARCH_LH7A400) -# define CPLD_SPID __REGP16(CPLD06_VIRT) /* SPI data */ -# define CPLD_SPIC __REGP16(CPLD08_VIRT) /* SPI control */ -# define CPLD_SPIC_CS_CODEC (1<<0) -# define CPLD_SPIC_CS_TOUCH (1<<1) -# define CPLD_SPIC_WRITE (0<<2) -# define CPLD_SPIC_READ (1<<2) -# define CPLD_SPIC_DONE (1<<3) /* r/o */ -# define CPLD_SPIC_LOAD (1<<4) -# define CPLD_SPIC_START (1<<4) -# define CPLD_SPIC_LOADED (1<<5) /* r/o */ -#endif - -#define CPLD_SPI __REGP16(CPLD0A_VIRT) /* SPI operation */ -#define CPLD_SPI_CS_EEPROM (1<<3) -#define CPLD_SPI_SCLK (1<<2) -#define CPLD_SPI_TX_SHIFT (1) -#define CPLD_SPI_TX (1<<CPLD_SPI_TX_SHIFT) -#define CPLD_SPI_RX_SHIFT (0) -#define CPLD_SPI_RX (1<<CPLD_SPI_RX_SHIFT) - -/* *** FIXME: these timing values are substantially larger than the - *** chip requires. We may implement an nsleep () function. */ -#define T_SKH 1 /* Clock time high (us) */ -#define T_SKL 1 /* Clock time low (us) */ -#define T_CS 1 /* Minimum chip select low time (us) */ -#define T_CSS 1 /* Minimum chip select setup time (us) */ -#define T_DIS 1 /* Data setup time (us) */ - - /* EEPROM SPI bits */ -#define P_START (1<<9) -#define P_WRITE (1<<7) -#define P_READ (2<<7) -#define P_ERASE (3<<7) -#define P_EWDS (0<<7) -#define P_WRAL (0<<7) -#define P_ERAL (0<<7) -#define P_EWEN (0<<7) -#define P_A_EWDS (0<<5) -#define P_A_WRAL (1<<5) -#define P_A_ERAL (2<<5) -#define P_A_EWEN (3<<5) - -struct ssp_configuration { - int device; - int mode; - int speed; - int frame_size_write; - int frame_size_read; -}; - -static struct ssp_configuration ssp_configuration; -static spinlock_t ssp_lock; - -static void enable_cs (void) -{ - switch (ssp_configuration.device) { - case DEVICE_EEPROM: - CPLD_SPI |= CPLD_SPI_CS_EEPROM; - break; - } - udelay (T_CSS); -} - -static void disable_cs (void) -{ - switch (ssp_configuration.device) { - case DEVICE_EEPROM: - CPLD_SPI &= ~CPLD_SPI_CS_EEPROM; - break; - } - udelay (T_CS); -} - -static void pulse_clock (void) -{ - CPLD_SPI |= CPLD_SPI_SCLK; - udelay (T_SKH); - CPLD_SPI &= ~CPLD_SPI_SCLK; - udelay (T_SKL); -} - - -/* execute_spi_command - - sends an spi command to a device. It first sends cwrite bits from - v. If cread is greater than zero it will read cread bits - (discarding the leading 0 bit) and return them. If cread is less - than zero it will check for completetion status and return 0 on - success or -1 on timeout. If cread is zero it does nothing other - than sending the command. - - On the LPD7A400, we can only read or write multiples of 8 bits on - the codec and the touch screen device. Here, we round up. - -*/ - -static int execute_spi_command (int v, int cwrite, int cread) -{ - unsigned long l = 0; - -#if defined (CONFIG_MACH_LPD7A400) - /* The codec and touch devices cannot be bit-banged. Instead, - * the CPLD provides an eight-bit shift register and a crude - * interface. */ - if ( ssp_configuration.device == DEVICE_CODEC - || ssp_configuration.device == DEVICE_TOUCH) { - int select = 0; - - PRINTK ("spi(%d %d.%d) 0x%04x", - ssp_configuration.device, cwrite, cread, - v); -#if defined (TALK) - if (ssp_configuration.device == DEVICE_CODEC) - PRINTK (" 0x%03x -> %2d", v & 0x1ff, (v >> 9) & 0x7f); -#endif - PRINTK ("\n"); - - if (ssp_configuration.device == DEVICE_CODEC) - select = CPLD_SPIC_CS_CODEC; - if (ssp_configuration.device == DEVICE_TOUCH) - select = CPLD_SPIC_CS_TOUCH; - if (cwrite) { - for (cwrite = (cwrite + 7)/8; cwrite-- > 0; ) { - CPLD_SPID = (v >> (8*cwrite)) & 0xff; - CPLD_SPIC = select | CPLD_SPIC_LOAD; - while (!(CPLD_SPIC & CPLD_SPIC_LOADED)) - ; - CPLD_SPIC = select; - while (!(CPLD_SPIC & CPLD_SPIC_DONE)) - ; - } - v = 0; - } - if (cread) { - mdelay (2); /* *** FIXME: required by ads7843? */ - v = 0; - for (cread = (cread + 7)/8; cread-- > 0;) { - CPLD_SPID = 0; - CPLD_SPIC = select | CPLD_SPIC_READ - | CPLD_SPIC_START; - while (!(CPLD_SPIC & CPLD_SPIC_LOADED)) - ; - CPLD_SPIC = select | CPLD_SPIC_READ; - while (!(CPLD_SPIC & CPLD_SPIC_DONE)) - ; - v = (v << 8) | CPLD_SPID; - } - } - return v; - } -#endif - - PRINTK ("spi(%d) 0x%04x -> 0x%x\r\n", ssp_configuration.device, - v & 0x1ff, (v >> 9) & 0x7f); - - enable_cs (); - - v <<= CPLD_SPI_TX_SHIFT; /* Correction for position of SPI_TX bit */ - while (cwrite--) { - CPLD_SPI - = (CPLD_SPI & ~CPLD_SPI_TX) - | ((v >> cwrite) & CPLD_SPI_TX); - udelay (T_DIS); - pulse_clock (); - } - - if (cread < 0) { - int delay = 10; - disable_cs (); - udelay (1); - enable_cs (); - - l = -1; - do { - if (CPLD_SPI & CPLD_SPI_RX) { - l = 0; - break; - } - } while (udelay (1), --delay); - } - else - /* We pulse the clock before the data to skip the leading zero. */ - while (cread-- > 0) { - pulse_clock (); - l = (l<<1) - | (((CPLD_SPI & CPLD_SPI_RX) - >> CPLD_SPI_RX_SHIFT) & 0x1); - } - - disable_cs (); - return l; -} - -static int ssp_init (void) -{ - spin_lock_init (&ssp_lock); - memset (&ssp_configuration, 0, sizeof (ssp_configuration)); - return 0; -} - - -/* ssp_chip_select - - drops the chip select line for the CPLD shift-register controlled - devices. It doesn't enable chip - -*/ - -static void ssp_chip_select (int enable) -{ -#if defined (CONFIG_MACH_LPD7A400) - int select; - - if (ssp_configuration.device == DEVICE_CODEC) - select = CPLD_SPIC_CS_CODEC; - else if (ssp_configuration.device == DEVICE_TOUCH) - select = CPLD_SPIC_CS_TOUCH; - else - return; - - if (enable) - CPLD_SPIC = select; - else - CPLD_SPIC = 0; -#endif -} - -static void ssp_acquire (void) -{ - spin_lock (&ssp_lock); -} - -static void ssp_release (void) -{ - ssp_chip_select (0); /* just in case */ - spin_unlock (&ssp_lock); -} - -static int ssp_configure (int device, int mode, int speed, - int frame_size_write, int frame_size_read) -{ - ssp_configuration.device = device; - ssp_configuration.mode = mode; - ssp_configuration.speed = speed; - ssp_configuration.frame_size_write = frame_size_write; - ssp_configuration.frame_size_read = frame_size_read; - - return 0; -} - -static int ssp_read (void) -{ - return execute_spi_command (0, 0, ssp_configuration.frame_size_read); -} - -static int ssp_write (u16 data) -{ - execute_spi_command (data, ssp_configuration.frame_size_write, 0); - return 0; -} - -static int ssp_write_read (u16 data) -{ - return execute_spi_command (data, ssp_configuration.frame_size_write, - ssp_configuration.frame_size_read); -} - -struct ssp_driver lh7a40x_cpld_ssp_driver = { - .init = ssp_init, - .acquire = ssp_acquire, - .release = ssp_release, - .configure = ssp_configure, - .chip_select = ssp_chip_select, - .read = ssp_read, - .write = ssp_write, - .write_read = ssp_write_read, -}; - - -MODULE_AUTHOR("Marc Singer"); -MODULE_DESCRIPTION("LPD7A40X CPLD SPI driver"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c deleted file mode 100644 index 4601e425bae3..000000000000 --- a/arch/arm/mach-lh7a40x/time.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * arch/arm/mach-lh7a40x/time.c - * - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/time.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <asm/irq.h> -#include <asm/leds.h> - -#include <asm/mach/time.h> -#include "common.h" - -#if HZ < 100 -# define TIMER_CONTROL TIMER_CONTROL2 -# define TIMER_LOAD TIMER_LOAD2 -# define TIMER_CONSTANT (508469/HZ) -# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC | TIMER_C_508KHZ) -# define TIMER_EOI TIMER_EOI2 -# define TIMER_IRQ IRQ_T2UI -#else -# define TIMER_CONTROL TIMER_CONTROL3 -# define TIMER_LOAD TIMER_LOAD3 -# define TIMER_CONSTANT (3686400/HZ) -# define TIMER_MODE (TIMER_C_ENABLE | TIMER_C_PERIODIC) -# define TIMER_EOI TIMER_EOI3 -# define TIMER_IRQ IRQ_T3UI -#endif - -static irqreturn_t -lh7a40x_timer_interrupt(int irq, void *dev_id) -{ - TIMER_EOI = 0; - timer_tick(); - - return IRQ_HANDLED; -} - -static struct irqaction lh7a40x_timer_irq = { - .name = "LHA740x Timer Tick", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = lh7a40x_timer_interrupt, -}; - -static void __init lh7a40x_timer_init (void) -{ - /* Stop/disable all timers */ - TIMER_CONTROL1 = 0; - TIMER_CONTROL2 = 0; - TIMER_CONTROL3 = 0; - - setup_irq (TIMER_IRQ, &lh7a40x_timer_irq); - - TIMER_LOAD = TIMER_CONSTANT; - TIMER_CONTROL = TIMER_MODE; -} - -struct sys_timer lh7a40x_timer = { - .init = &lh7a40x_timer_init, -}; |
