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author | Kukjin Kim <kgene.kim@samsung.com> | 2010-02-22 00:02:59 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-02-24 21:07:22 +0000 |
commit | d6d502fa4be1acd01971476fc732c95a4da16d90 (patch) | |
tree | d6c5118046c02f489765bebc4f7c8be71e8375a2 /security | |
parent | 3b43816f685fc6c2531f43514662f796f4601ffc (diff) | |
download | talos-obmc-linux-d6d502fa4be1acd01971476fc732c95a4da16d90.tar.gz talos-obmc-linux-d6d502fa4be1acd01971476fc732c95a4da16d90.zip |
ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig
Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with
L1 cache lines which are 64bytes to indicate this without having to
alter the arch/arm/mm/Kconfig entry each time.
Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value
uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.
Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions