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authorDavid Howells <dhowells@redhat.com>2012-10-13 10:46:48 +0100
committerDavid Howells <dhowells@redhat.com>2012-10-13 10:46:48 +0100
commit607ca46e97a1b6594b29647d98a32d545c24bdff (patch)
tree30f4c0784bfddb57332cdc0678bd06d1e77fa185 /include/uapi/linux/pci.h
parent08cce05c5a91f5017f4edc9866cf026908c73f9f (diff)
downloadtalos-obmc-linux-607ca46e97a1b6594b29647d98a32d545c24bdff.tar.gz
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UAPI: (Scripted) Disintegrate include/linux
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'include/uapi/linux/pci.h')
-rw-r--r--include/uapi/linux/pci.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/include/uapi/linux/pci.h b/include/uapi/linux/pci.h
new file mode 100644
index 000000000000..3c292bc0d1c1
--- /dev/null
+++ b/include/uapi/linux/pci.h
@@ -0,0 +1,41 @@
+/*
+ * pci.h
+ *
+ * PCI defines and function prototypes
+ * Copyright 1994, Drew Eckhardt
+ * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
+ *
+ * For more information, please consult the following manuals (look at
+ * http://www.pcisig.com/ for how to get them):
+ *
+ * PCI BIOS Specification
+ * PCI Local Bus Specification
+ * PCI to PCI Bridge Specification
+ * PCI System Design Guide
+ */
+
+#ifndef _UAPILINUX_PCI_H
+#define _UAPILINUX_PCI_H
+
+#include <linux/pci_regs.h> /* The pci register defines */
+
+/*
+ * The PCI interface treats multi-function devices as independent
+ * devices. The slot/function address of each device is encoded
+ * in a single byte as follows:
+ *
+ * 7:3 = slot
+ * 2:0 = function
+ */
+#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
+#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
+#define PCI_FUNC(devfn) ((devfn) & 0x07)
+
+/* Ioctls for /proc/bus/pci/X/Y nodes. */
+#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
+#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
+#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
+#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
+#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
+
+#endif /* _UAPILINUX_PCI_H */
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