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| author | Sukanto Ghosh <sghosh@apm.com> | 2013-05-14 10:26:54 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-05-14 15:44:50 +0100 |
| commit | b4fed0796841b5293b9c9427a5391b7bb20ef2d9 (patch) | |
| tree | 0a17c86e49059cfbec754bc1664fdd2c1692ad50 /include/target | |
| parent | c560ecfe9617c629ad09b07edb7523c87b2c9619 (diff) | |
| download | talos-obmc-linux-b4fed0796841b5293b9c9427a5391b7bb20ef2d9.tar.gz talos-obmc-linux-b4fed0796841b5293b9c9427a5391b7bb20ef2d9.zip | |
arm64: mm: Fix operands of clz in __flush_dcache_all
The format of the lower 32-bits of the 64-bit operand to 'dc cisw' is
unchanged from ARMv7 architecture and the upper bits are RES0. This
implies that the 'way' field of the operand of 'dc cisw' occupies the
bit-positions [31 .. (32-A)]. Due to the use of 64-bit extended operands
to 'clz', the existing implementation of __flush_dcache_all is incorrectly
placing the 'way' field in the bit-positions [63 .. (64-A)].
Signed-off-by: Sukanto Ghosh <sghosh@apm.com>
Tested-by: Anup Patel <anup.patel@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'include/target')
0 files changed, 0 insertions, 0 deletions
