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authorArnd Bergmann <arnd@arndb.de>2018-03-12 15:27:14 +0100
committerArnd Bergmann <arnd@arndb.de>2018-03-12 15:27:14 +0100
commitfdda85f6969cadf4fda8c1eb15c1ac7ec8798bcd (patch)
treecbb17c3c986fbf84df25c0cd4d3e63d9e9d46ba3 /include/linux/platform_data
parent40590db64fabb35d9e19d66bd0880dda9631ab6a (diff)
parent0b8129278fdc30fa3281f435db419ab2d610085b (diff)
downloadtalos-obmc-linux-fdda85f6969cadf4fda8c1eb15c1ac7ec8798bcd.tar.gz
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Merge tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux into next/soc
Pull "This is the pxa changes for v4.17 cycle" from Robert Jarzmik: - minor changes for property API - clock API fix for ULPI driver warning It exceptionally contains a merge from the mtd tree from Boris to prevent any merge conflicts in the PXA tree. * tag 'pxa-for-4.17' of https://github.com/rjarzmik/linux: ARM: pxa/raumfeld: use PROPERTY_ENTRY_U32() directly ARM: pxa: ulpi: fix ulpi timeout and slowpath warn ARM: pxa: cm-x300: remove inline directive ARM: pxa: fix static checker warning in pxa3xx-ulpi MAINTAINERS: remove entry for deleted pxa3xx_nand driver arm: dts: pxa: use reworked NAND controller driver dt-bindings: mtd: remove pxa3xx NAND controller documentation mtd: nand: remove useless fields from pxa3xx NAND platform data mtd: nand: remove deprecated pxa3xx_nand driver mtd: nand: use Marvell reworked NAND controller driver with all platforms
Diffstat (limited to 'include/linux/platform_data')
-rw-r--r--include/linux/platform_data/mtd-nand-pxa3xx.h43
1 files changed, 12 insertions, 31 deletions
diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h
index b42ad83cbc20..4fd0f592a2d2 100644
--- a/include/linux/platform_data/mtd-nand-pxa3xx.h
+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
@@ -6,41 +6,22 @@
#include <linux/mtd/partitions.h>
/*
- * Current pxa3xx_nand controller has two chip select which
- * both be workable.
- *
- * Notice should be taken that:
- * When you want to use this feature, you should not enable the
- * keep configuration feature, for two chip select could be
- * attached with different nand chip. The different page size
- * and timing requirement make the keep configuration impossible.
+ * Current pxa3xx_nand controller has two chip select which both be workable but
+ * historically all platforms remaining on platform data used only one. Switch
+ * to device tree if you need more.
*/
-
-/* The max num of chip select current support */
-#define NUM_CHIP_SELECT (2)
struct pxa3xx_nand_platform_data {
-
- /* the data flash bus is shared between the Static Memory
- * Controller and the Data Flash Controller, the arbiter
- * controls the ownership of the bus
- */
- int enable_arbiter;
-
- /* allow platform code to keep OBM/bootloader defined NFC config */
- int keep_config;
-
- /* indicate how many chip selects will be used */
- int num_cs;
-
- /* use an flash-based bad block table */
- bool flash_bbt;
-
- /* requested ECC strength and ECC step size */
+ /* Keep OBM/bootloader NFC timing configuration */
+ bool keep_config;
+ /* Use a flash-based bad block table */
+ bool flash_bbt;
+ /* Requested ECC strength and ECC step size */
int ecc_strength, ecc_step_size;
-
- const struct mtd_partition *parts[NUM_CHIP_SELECT];
- unsigned int nr_parts[NUM_CHIP_SELECT];
+ /* Partitions */
+ const struct mtd_partition *parts;
+ unsigned int nr_parts;
};
extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
+
#endif /* __ASM_ARCH_PXA3XX_NAND_H */
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