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authorRafał Miłecki <zajec5@gmail.com>2011-07-16 18:43:36 +0200
committerJohn W. Linville <linville@tuxdriver.com>2011-07-19 17:03:08 -0400
commitbb932ad9805029af18232ffe5603fbc68e1c1fb6 (patch)
tree617b1abbfb00f517aa749b157cca642f30a6c433 /include/linux/bcma
parent2729df25550f041940f23c11ee8252094a6bd44b (diff)
downloadtalos-obmc-linux-bb932ad9805029af18232ffe5603fbc68e1c1fb6.tar.gz
talos-obmc-linux-bb932ad9805029af18232ffe5603fbc68e1c1fb6.zip
bcma: move define of BCMA_CLKCTLST register
Recent experiments have shown many cores share 0x1E0 register used for clock management. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/bcma')
-rw-r--r--include/linux/bcma/bcma_driver_chipcommon.h10
-rw-r--r--include/linux/bcma/bcma_regs.h19
2 files changed, 20 insertions, 9 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index 68c3d941a215..a0f684615ae5 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -179,15 +179,7 @@
#define BCMA_CC_PROG_WAITCNT 0x0124
#define BCMA_CC_FLASH_CFG 0x0128
#define BCMA_CC_FLASH_WAITCNT 0x012C
-#define BCMA_CC_CLKCTLST 0x01E0 /* Clock control and status (rev >= 20) */
-#define BCMA_CC_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
-#define BCMA_CC_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
-#define BCMA_CC_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
-#define BCMA_CC_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
-#define BCMA_CC_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
-#define BCMA_CC_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
-#define BCMA_CC_CLKCTLST_HAVEHT 0x00010000 /* HT available */
-#define BCMA_CC_CLKCTLST_HAVEALP 0x00020000 /* APL available */
+/* 0x1E0 is defined as shared BCMA_CLKCTLST */
#define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
#define BCMA_CC_UART0_DATA 0x0300
#define BCMA_CC_UART0_IMR 0x0304
diff --git a/include/linux/bcma/bcma_regs.h b/include/linux/bcma/bcma_regs.h
index 889219535a83..9faae2ae02e8 100644
--- a/include/linux/bcma/bcma_regs.h
+++ b/include/linux/bcma/bcma_regs.h
@@ -1,6 +1,25 @@
#ifndef LINUX_BCMA_REGS_H_
#define LINUX_BCMA_REGS_H_
+/* Some single registers are shared between many cores */
+/* BCMA_CLKCTLST: ChipCommon (rev >= 20), PCIe, 80211 */
+#define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
+#define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
+#define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
+#define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
+#define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
+#define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
+#define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
+#define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
+#define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
+#define BCMA_CLKCTLST_HAVEHT 0x00020000 /* HT available */
+#define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */
+#define BCMA_CLKCTLST_BP_ON_HT 0x00080000 /* RO: running on HT clock */
+#define BCMA_CLKCTLST_EXTRESST 0x07000000 /* Mask of external resource status */
+/* Is there any BCM4328 on BCMA bus? */
+#define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
+#define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
+
/* Agent registers (common for every core) */
#define BCMA_IOCTL 0x0408 /* IO control */
#define BCMA_IOCTL_CLK 0x0001
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