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author | Ingo Molnar <mingo@elte.hu> | 2008-07-29 00:07:55 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-29 00:07:55 +0200 |
commit | cb28a1bbdb4790378e7366d6c9ee1d2340b84f92 (patch) | |
tree | 316436f77dac75335fd2c3ef5f109e71606c50d3 /include/asm-sparc/tsunami.h | |
parent | b6d4f7e3ef25beb8c658c97867d98883e69dc544 (diff) | |
parent | f934fb19ef34730263e6afc01e8ec27a8a71470f (diff) | |
download | talos-obmc-linux-cb28a1bbdb4790378e7366d6c9ee1d2340b84f92.tar.gz talos-obmc-linux-cb28a1bbdb4790378e7366d6c9ee1d2340b84f92.zip |
Merge branch 'linus' into core/generic-dma-coherent
Conflicts:
arch/x86/Kconfig
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-sparc/tsunami.h')
-rw-r--r-- | include/asm-sparc/tsunami.h | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/include/asm-sparc/tsunami.h b/include/asm-sparc/tsunami.h deleted file mode 100644 index 5bbd1d523baa..000000000000 --- a/include/asm-sparc/tsunami.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * tsunami.h: Module specific definitions for Tsunami V8 Sparcs - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_TSUNAMI_H -#define _SPARC_TSUNAMI_H - -#include <asm/asi.h> - -/* The MMU control register on the Tsunami: - * - * ----------------------------------------------------------------------- - * | implvers |SW|AV|DV|MV| RSV |PC|ITD|ALC| RSV |PE| RC |IE|DE|RSV|NF|ME| - * ----------------------------------------------------------------------- - * 31 24 23 22 21 20 19-18 17 16 14 13-12 11 10-9 8 7 6-2 1 0 - * - * SW: Enable Software Table Walks 0=off 1=on - * AV: Address View bit - * DV: Data View bit - * MV: Memory View bit - * PC: Parity Control - * ITD: ITBR disable - * ALC: Alternate Cacheable - * PE: Parity Enable 0=off 1=on - * RC: Refresh Control - * IE: Instruction cache Enable 0=off 1=on - * DE: Data cache Enable 0=off 1=on - * NF: No Fault, same as all other SRMMUs - * ME: MMU Enable, same as all other SRMMUs - */ - -#define TSUNAMI_SW 0x00800000 -#define TSUNAMI_AV 0x00400000 -#define TSUNAMI_DV 0x00200000 -#define TSUNAMI_MV 0x00100000 -#define TSUNAMI_PC 0x00020000 -#define TSUNAMI_ITD 0x00010000 -#define TSUNAMI_ALC 0x00008000 -#define TSUNAMI_PE 0x00001000 -#define TSUNAMI_RCMASK 0x00000C00 -#define TSUNAMI_IENAB 0x00000200 -#define TSUNAMI_DENAB 0x00000100 -#define TSUNAMI_NF 0x00000002 -#define TSUNAMI_ME 0x00000001 - -static inline void tsunami_flush_icache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_IC_FLCLEAR) - : "memory"); -} - -static inline void tsunami_flush_dcache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_DC_FLCLEAR) - : "memory"); -} - -#endif /* !(_SPARC_TSUNAMI_H) */ |