diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 17:38:11 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 17:38:11 +0900 |
| commit | e5723e0eeb2dc16629e86d66785024ead9169000 (patch) | |
| tree | 7fe39cdaf3106cc726d3b84fdc998b382b6c5e22 /include/asm-sh/cpu-sh3 | |
| parent | ecd9561687a0952a96a0a705f618e59cb6f3189b (diff) | |
| download | talos-obmc-linux-e5723e0eeb2dc16629e86d66785024ead9169000.tar.gz talos-obmc-linux-e5723e0eeb2dc16629e86d66785024ead9169000.zip | |
sh: Add support for SH7706/SH7710/SH7343 CPUs.
This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh3')
| -rw-r--r-- | include/asm-sh/cpu-sh3/cache.h | 4 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh3/mmu_context.h | 8 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh3/timer.h | 1 | ||||
| -rw-r--r-- | include/asm-sh/cpu-sh3/ubc.h | 15 |
4 files changed, 22 insertions, 6 deletions
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h index 406aa8d9b947..ffe08d2813f9 100644 --- a/include/asm-sh/cpu-sh3/cache.h +++ b/include/asm-sh/cpu-sh3/cache.h @@ -26,12 +26,10 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710) #define CCR3 0xa40000b4 #define CCR_CACHE_16KB 0x00010000 #define CCR_CACHE_32KB 0x00020000 #endif - #endif /* __ASM_CPU_SH3_CACHE_H */ - diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h index a844ea0965b6..bccb7ddb438b 100644 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ b/include/asm-sh/cpu-sh3/mmu_context.h @@ -27,8 +27,12 @@ #define TRA 0xffffffd0 #define EXPEVT 0xffffffd4 -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else #define INTEVT 0xffffffd8 diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 2082ad956f21..b2394cf76f49 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h @@ -20,6 +20,7 @@ * SH7710 * SH7720 * SH7300 + * SH7710 * --------------------------------------------------------------------------- */ diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h index 0f809dec4e17..9d308cbe9b29 100644 --- a/include/asm-sh/cpu-sh3/ubc.h +++ b/include/asm-sh/cpu-sh3/ubc.h @@ -11,6 +11,19 @@ #ifndef __ASM_CPU_SH3_UBC_H #define __ASM_CPU_SH3_UBC_H +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#define UBC_BARA 0xa4ffffb0 +#define UBC_BAMRA 0xa4ffffb4 +#define UBC_BBRA 0xa4ffffb8 +#define UBC_BASRA 0xffffffe4 +#define UBC_BARB 0xa4ffffa0 +#define UBC_BAMRB 0xa4ffffa4 +#define UBC_BBRB 0xa4ffffa8 +#define UBC_BASRB 0xffffffe8 +#define UBC_BDRB 0xa4ffff90 +#define UBC_BDMRB 0xa4ffff94 +#define UBC_BRCR 0xa4ffff98 +#else #define UBC_BARA 0xffffffb0 #define UBC_BAMRA 0xffffffb4 #define UBC_BBRA 0xffffffb8 @@ -22,6 +35,6 @@ #define UBC_BDRB 0xffffff90 #define UBC_BDMRB 0xffffff94 #define UBC_BRCR 0xffffff98 +#endif #endif /* __ASM_CPU_SH3_UBC_H */ - |
