summaryrefslogtreecommitdiffstats
path: root/drivers/watchdog
diff options
context:
space:
mode:
authorDoug Anderson <dianders@chromium.org>2015-01-27 14:25:16 -0800
committerWim Van Sebroeck <wim@iguana.be>2015-02-17 21:33:43 +0100
commita00850107eb050bf6427a8f3a0445bce9441b5df (patch)
tree65c5862d3d13cfc9b6a44ab0143cc2082e9f66ef /drivers/watchdog
parenta77841d59eb54ceb7b97b5e23053cd205e3a4c00 (diff)
downloadtalos-obmc-linux-a00850107eb050bf6427a8f3a0445bce9441b5df.tar.gz
talos-obmc-linux-a00850107eb050bf6427a8f3a0445bce9441b5df.zip
watchdog: dw_wdt: pat the watchdog before enabling it
On some dw_wdt implementations the "top" register may be initted to 0 at bootup. In such a case, each "pat" of the watchdog will reset the timer to 0xffff. That's pretty short. The input clock of the wdt can be any of a wide range of values. On an rk3288 system, I've seen the wdt clock be 24.75 MHz. That means each tick is ~40ns and we'll count to 0xffff in ~2.6ms. Because of the above two facts, it's a really good idea to pat the watchdog after initting the "top" register properly and before enabling the watchdog. If you don't then there's no way we'll get the next heartbeat in time. Jisheng Zhang fixed this problem on some dw_wdt versions by using the TOP_INIT feature. However, the dw_wdt on rk3288 doesn't have TOP_INIT so it's a good idea to also pat the watchdog manually. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/dw_wdt.c26
1 files changed, 19 insertions, 7 deletions
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
index b34a2e4e4e43..3dde6de117fa 100644
--- a/drivers/watchdog/dw_wdt.c
+++ b/drivers/watchdog/dw_wdt.c
@@ -96,6 +96,12 @@ static inline void dw_wdt_set_next_heartbeat(void)
dw_wdt.next_heartbeat = jiffies + dw_wdt_get_top() * HZ;
}
+static void dw_wdt_keepalive(void)
+{
+ writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
+ WDOG_COUNTER_RESTART_REG_OFFSET);
+}
+
static int dw_wdt_set_top(unsigned top_s)
{
int i, top_val = DW_WDT_MAX_TOP;
@@ -110,21 +116,27 @@ static int dw_wdt_set_top(unsigned top_s)
break;
}
- /* Set the new value in the watchdog. */
+ /*
+ * Set the new value in the watchdog. Some versions of dw_wdt
+ * have have TOPINIT in the TIMEOUT_RANGE register (as per
+ * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
+ * effectively get a pat of the watchdog right here.
+ */
writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
+ /*
+ * Add an explicit pat to handle versions of the watchdog that
+ * don't have TOPINIT. This won't hurt on versions that have
+ * it.
+ */
+ dw_wdt_keepalive();
+
dw_wdt_set_next_heartbeat();
return dw_wdt_top_in_seconds(top_val);
}
-static void dw_wdt_keepalive(void)
-{
- writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
- WDOG_COUNTER_RESTART_REG_OFFSET);
-}
-
static int dw_wdt_restart_handle(struct notifier_block *this,
unsigned long mode, void *cmd)
{
OpenPOWER on IntegriCloud