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author | Elise Lennion <elise.lennion@gmail.com> | 2016-10-13 19:25:52 -0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-10-16 10:27:36 +0200 |
commit | 3fcb465f1e74ef0cb1edd921c3551170548051e2 (patch) | |
tree | b6843bcc3a3a6c880011ed7cb95cee67c2d7b9c5 /drivers/staging/sm750fb/ddk750_chip.c | |
parent | 3f98afe0b6d6d8d7a72461f9b13da122fe08d20e (diff) | |
download | talos-obmc-linux-3fcb465f1e74ef0cb1edd921c3551170548051e2.tar.gz talos-obmc-linux-3fcb465f1e74ef0cb1edd921c3551170548051e2.zip |
staging: sm750fb: Replace functions CamelCase naming with underscores.
Replace CamelCase function names with underscores to comply with
the standard kernel coding style.
Signed-off-by: Elise Lennion <elise.lennion@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_chip.c')
-rw-r--r-- | drivers/staging/sm750fb/ddk750_chip.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 2b231c28af16..a127eb2b4cbc 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -51,7 +51,7 @@ static unsigned int get_mxclk_freq(void) * * Input: Frequency to be set. */ -static void setChipClock(unsigned int frequency) +static void set_chip_clock(unsigned int frequency) { struct pll_value pll; unsigned int ulActualMxClk; @@ -68,19 +68,19 @@ static void setChipClock(unsigned int frequency) pll.clockType = MXCLK_PLL; /* - * Call calcPllValue() to fill the other fields of PLL structure. + * Call calc_pll_value() to fill the other fields of PLL structure. * Sometime, the chip cannot set up the exact clock * required by the User. - * Return value of calcPllValue gives the actual possible clock. + * Return value of calc_pll_value gives the actual possible clock. */ - ulActualMxClk = calcPllValue(frequency, &pll); + ulActualMxClk = calc_pll_value(frequency, &pll); /* Master Clock Control: MXCLK_PLL */ - POKE32(MXCLK_PLL_CTRL, formatPllReg(&pll)); + POKE32(MXCLK_PLL_CTRL, format_pll_reg(&pll)); } } -static void setMemoryClock(unsigned int frequency) +static void set_memory_clock(unsigned int frequency) { unsigned int reg, divisor; @@ -119,7 +119,7 @@ static void setMemoryClock(unsigned int frequency) break; } - setCurrentGate(reg); + set_current_gate(reg); } } @@ -131,7 +131,7 @@ static void setMemoryClock(unsigned int frequency) * NOTE: * The maximum frequency the engine can run is 168MHz. */ -static void setMasterClock(unsigned int frequency) +static void set_master_clock(unsigned int frequency) { unsigned int reg, divisor; @@ -169,11 +169,11 @@ static void setMasterClock(unsigned int frequency) break; } - setCurrentGate(reg); + set_current_gate(reg); } } -unsigned int ddk750_getVMSize(void) +unsigned int ddk750_get_vm_size(void) { unsigned int reg; unsigned int data; @@ -205,18 +205,18 @@ unsigned int ddk750_getVMSize(void) return data; } -int ddk750_initHw(struct initchip_param *pInitParam) +int ddk750_init_hw(struct initchip_param *pInitParam) { unsigned int reg; if (pInitParam->powerMode != 0) pInitParam->powerMode = 0; - setPowerMode(pInitParam->powerMode); + set_power_mode(pInitParam->powerMode); /* Enable display power gate & LOCALMEM power gate*/ reg = PEEK32(CURRENT_GATE); reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM); - setCurrentGate(reg); + set_current_gate(reg); if (sm750_get_chip_type() != SM750LE) { /* set panel pll and graphic mode via mmio_88 */ @@ -232,13 +232,13 @@ int ddk750_initHw(struct initchip_param *pInitParam) } /* Set the Main Chip Clock */ - setChipClock(MHz((unsigned int)pInitParam->chipClock)); + set_chip_clock(MHz((unsigned int)pInitParam->chipClock)); /* Set up memory clock. */ - setMemoryClock(MHz(pInitParam->memClock)); + set_memory_clock(MHz(pInitParam->memClock)); /* Set up master clock */ - setMasterClock(MHz(pInitParam->masterClock)); + set_master_clock(MHz(pInitParam->masterClock)); /* Reset the memory controller. @@ -304,7 +304,7 @@ int ddk750_initHw(struct initchip_param *pInitParam) * M = {1,...,255} * N = {2,...,15} */ -unsigned int calcPllValue(unsigned int request_orig, struct pll_value *pll) +unsigned int calc_pll_value(unsigned int request_orig, struct pll_value *pll) { /* as sm750 register definition, * N located in 2,15 and M located in 1,255 @@ -372,7 +372,7 @@ unsigned int calcPllValue(unsigned int request_orig, struct pll_value *pll) return ret; } -unsigned int formatPllReg(struct pll_value *pPLL) +unsigned int format_pll_reg(struct pll_value *pPLL) { #ifndef VALIDATION_CHIP unsigned int POD = pPLL->POD; |