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authorAndrew Bresticker <abrestic@chromium.org>2015-06-18 17:28:40 -0400
committerThierry Reding <treding@nvidia.com>2016-04-28 12:41:44 +0200
commit3358d2d9f47af86bdd71edb24b361f72a54ec04e (patch)
tree3ae890b9c2ef525ff6177eb8a2ee154142829719 /drivers/ptp/ptp_pch.c
parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)
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clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
On Tegra210, hardware control of the SATA and XUSB pad PLLs must be done during the UPHY enable sequence rather than the PLLE enable sequence. Export functions to do this so that hardware control can be enabled from the XUSB padctl driver. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/ptp/ptp_pch.c')
0 files changed, 0 insertions, 0 deletions
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