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authorLaura Mihaela Vasilescu <laura.vasilescu@rosedu.org>2013-07-31 20:19:48 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2013-08-22 02:26:18 -0700
commitc342b39ea7ca0e46e093cdb346bf52b2b4e71b01 (patch)
tree292ddfb602b12606fd6b2612bcb727da699de08a /drivers/net
parent7dc98a623392b39f8670755d4b65968b80f01716 (diff)
downloadtalos-obmc-linux-c342b39ea7ca0e46e093cdb346bf52b2b4e71b01.tar.gz
talos-obmc-linux-c342b39ea7ca0e46e093cdb346bf52b2b4e71b01.zip
igb: Add macro for size of RETA indirection table
RETA indirection table is used to assign the received data to a CPU in order to maintain an efficient distribution of network receive processing across multiple CPUs. This patch removes the hard-coded value for the size of the indirection table and defines a new macro. Signed-off-by: Laura Mihaela Vasilescu <laura.vasilescu@rosedu.org> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/intel/igb/igb.h2
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c2
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index 15ea8dc9dad3..5a2659bf0c32 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -343,6 +343,8 @@ struct hwmon_buff {
};
#endif
+#define IGB_RETA_SIZE 128
+
/* board specific private data structure */
struct igb_adapter {
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 7f6cf654b307..1acd9c06026a 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -3157,7 +3157,7 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)
* we are generating the results for n and n+2 and then interleaving
* those with the results with n+1 and n+3.
*/
- for (j = 0; j < 32; j++) {
+ for (j = 0; j < IGB_RETA_SIZE / 4; j++) {
/* first pass generates n and n+2 */
u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
u32 reta = (base & 0x07800780) >> (7 - shift);
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