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authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2013-08-12 14:14:56 -0300
committerDavid Woodhouse <David.Woodhouse@intel.com>2013-08-30 21:35:00 +0100
commitf4db2e3a3315019c419a7ee8ebaf5d8b361be791 (patch)
tree4ebf093843df2edaf586c03eec08f3a9c533aa32 /drivers/mtd
parent48cf7efa6be22e5ab42c16e2700e401f2e6f8bad (diff)
downloadtalos-obmc-linux-f4db2e3a3315019c419a7ee8ebaf5d8b361be791.tar.gz
talos-obmc-linux-f4db2e3a3315019c419a7ee8ebaf5d8b361be791.zip
mtd: nand: pxa3xx: Make dma code dependent on dma capable platforms
This patch adds a macro ARCH_HAS_DMA to compile-out arch specific dma code, namely pxa_request_dma() and pxa_free_dma(). These symbols are available only in pxa, which makes impossible to build the driver in other platforms than ARCH_PXA. In order to handle non-dma capable platforms, we implement a fallbacks that allocate buffers as if 'use_dma=false', putting the dma related code under the ARCH_HAS_DMA conditional. Please note that the correct way to handle this is to migrate the dma code to use of the mmp_pdma dmaengine driver. However, currently this is not possible because the two dmaengine drivers can't work together. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 5e5f5302dd6f..ce343bfd0d65 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -25,7 +25,14 @@
#include <linux/of.h>
#include <linux/of_device.h>
+#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
+#define ARCH_HAS_DMA
+#endif
+
+#ifdef ARCH_HAS_DMA
#include <mach/dma.h>
+#endif
+
#include <linux/platform_data/mtd-nand-pxa3xx.h>
#define CHIP_DELAY_TIMEOUT (2 * HZ/10)
@@ -381,6 +388,7 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
}
}
+#ifdef ARCH_HAS_DMA
static void start_data_dma(struct pxa3xx_nand_info *info)
{
struct pxa_dma_desc *desc = info->data_desc;
@@ -427,6 +435,10 @@ static void pxa3xx_nand_data_dma_irq(int channel, void *data)
enable_int(info, NDCR_INT_MASK);
nand_writel(info, NDSR, NDSR_WRDREQ | NDSR_RDDREQ);
}
+#else
+static void start_data_dma(struct pxa3xx_nand_info *info)
+{}
+#endif
static irqreturn_t pxa3xx_nand_irq(int irq, void *devid)
{
@@ -905,6 +917,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
*/
#define MAX_BUFF_SIZE PAGE_SIZE
+#ifdef ARCH_HAS_DMA
static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
{
struct platform_device *pdev = info->pdev;
@@ -950,6 +963,20 @@ static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
kfree(info->data_buff);
}
}
+#else
+static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
+{
+ info->data_buff = kmalloc(MAX_BUFF_SIZE, GFP_KERNEL);
+ if (info->data_buff == NULL)
+ return -ENOMEM;
+ return 0;
+}
+
+static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
+{
+ kfree(info->data_buff);
+}
+#endif
static int pxa3xx_nand_sensing(struct pxa3xx_nand_info *info)
{
@@ -1265,6 +1292,13 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
struct pxa3xx_nand_info *info;
int ret, cs, probe_success;
+#ifndef ARCH_HAS_DMA
+ if (use_dma) {
+ use_dma = 0;
+ dev_warn(&pdev->dev,
+ "This platform can't do DMA on this device\n");
+ }
+#endif
ret = pxa3xx_nand_probe_dt(pdev);
if (ret)
return ret;
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