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authorTomer Maimon <tmaimon77@gmail.com>2019-01-14 15:06:58 +0200
committerJoel Stanley <joel@jms.id.au>2019-03-20 15:13:34 +1030
commitecb8eef8c48e38be3c823e066a63b747829cc3a2 (patch)
treed5111ef378e6900effdaad4fc852677262bce97a /drivers/mtd/spi-nor/Makefile
parent55e5a1b7d2e9487c6d4e401eb60323e1f49a2a90 (diff)
downloadtalos-obmc-linux-ecb8eef8c48e38be3c823e066a63b747829cc3a2.tar.gz
talos-obmc-linux-ecb8eef8c48e38be3c823e066a63b747829cc3a2.zip
mtd: spi-nor: add NPCM FIU controller driver
Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI-NOR controller driver The FIU supports single, dual or quad communication interface. the FIU controller can operate in following modes: - User Mode Access(UMA): provides flash access by using an indirect address/data mechanism. - direct rd/wr mode: maps the flash memory into the core address space. - SPI-X mode: used for an expansion bus to an ASIC or CPLD. OpenBMC-Staging-Count: 2 Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> [v5.0: Remove asm/size.h include to fix build] Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'drivers/mtd/spi-nor/Makefile')
-rw-r--r--drivers/mtd/spi-nor/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index a552efd22958..875619e724b3 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o
obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o
obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o
obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o
+obj-$(CONFIG_SPI_NPCM_FIU) += npcm-fiu.o
obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o
obj-$(CONFIG_SPI_INTEL_SPI_PCI) += intel-spi-pci.o
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