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authorFabrice Gasnier <fabrice.gasnier@st.com>2017-05-29 11:28:19 +0200
committerJonathan Cameron <jic23@kernel.org>2017-06-11 15:07:26 +0100
commit204a6a25db79a0d754451c023933e0470b498730 (patch)
tree9ff4d3cced3fa19202d5dcdf5f113eabad86bda7 /drivers/iio
parent64ad7f6438f3be51a14ee5ae766ffee76cd28b02 (diff)
downloadtalos-obmc-linux-204a6a25db79a0d754451c023933e0470b498730.tar.gz
talos-obmc-linux-204a6a25db79a0d754451c023933e0470b498730.zip
iio: adc: stm32: make per instance bus clock optional
STM32F4 requires one clock per ADC instance for register access. But, newer version of ADC hardware block have common bus clock for all instances (per instance driver isn't responsible for getting it). So, make it optional by default. Still, enforce it's required on STM32F4. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio')
-rw-r--r--drivers/iio/adc/stm32-adc.c28
1 files changed, 20 insertions, 8 deletions
diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 50b253806827..2ba9ca991f0a 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -160,6 +160,7 @@ struct stm32_adc;
* @regs: registers descriptions
* @adc_info: per instance input channels definitions
* @trigs: external trigger sources
+ * @clk_required: clock is required
* @start_conv: routine to start conversions
* @stop_conv: routine to stop conversions
*/
@@ -167,6 +168,7 @@ struct stm32_adc_cfg {
const struct stm32_adc_regspec *regs;
const struct stm32_adc_info *adc_info;
struct stm32_adc_trig_info *trigs;
+ bool clk_required;
void (*start_conv)(struct stm32_adc *, bool dma);
void (*stop_conv)(struct stm32_adc *);
};
@@ -1145,14 +1147,21 @@ static int stm32_adc_probe(struct platform_device *pdev)
adc->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(adc->clk)) {
- dev_err(&pdev->dev, "Can't get clock\n");
- return PTR_ERR(adc->clk);
+ ret = PTR_ERR(adc->clk);
+ if (ret == -ENOENT && !adc->cfg->clk_required) {
+ adc->clk = NULL;
+ } else {
+ dev_err(&pdev->dev, "Can't get clock\n");
+ return ret;
+ }
}
- ret = clk_prepare_enable(adc->clk);
- if (ret < 0) {
- dev_err(&pdev->dev, "clk enable failed\n");
- return ret;
+ if (adc->clk) {
+ ret = clk_prepare_enable(adc->clk);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "clk enable failed\n");
+ return ret;
+ }
}
ret = stm32_adc_of_get_resolution(indio_dev);
@@ -1196,7 +1205,8 @@ err_dma_disable:
dma_release_channel(adc->dma_chan);
}
err_clk_disable:
- clk_disable_unprepare(adc->clk);
+ if (adc->clk)
+ clk_disable_unprepare(adc->clk);
return ret;
}
@@ -1214,7 +1224,8 @@ static int stm32_adc_remove(struct platform_device *pdev)
adc->rx_buf, adc->rx_dma_buf);
dma_release_channel(adc->dma_chan);
}
- clk_disable_unprepare(adc->clk);
+ if (adc->clk)
+ clk_disable_unprepare(adc->clk);
return 0;
}
@@ -1223,6 +1234,7 @@ static const struct stm32_adc_cfg stm32f4_adc_cfg = {
.regs = &stm32f4_adc_regspec,
.adc_info = &stm32f4_adc_info,
.trigs = stm32f4_adc_trigs,
+ .clk_required = true,
.start_conv = stm32f4_adc_start_conv,
.stop_conv = stm32f4_adc_stop_conv,
};
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