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author | Alex Deucher <alexander.deucher@amd.com> | 2014-09-23 10:20:13 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2014-09-23 10:20:13 -0400 |
commit | 370ce45b5986118fa496dddbcd7039e1aa1a418f (patch) | |
tree | 4adc5875d9d71ffd57d2f8192523daf9ae6b4455 /drivers/gpu | |
parent | ff1b129403aad9a5c7cc9a6eaaffe4bd5fc0c67f (diff) | |
download | talos-obmc-linux-370ce45b5986118fa496dddbcd7039e1aa1a418f.tar.gz talos-obmc-linux-370ce45b5986118fa496dddbcd7039e1aa1a418f.zip |
drm/radeon/cik: use a separate counter for CP init timeout
Otherwise we may fail to init the second compute ring.
Noticed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 98dbaea21d08..3d546c606b43 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -4803,7 +4803,7 @@ struct bonaire_mqd */ static int cik_cp_compute_resume(struct radeon_device *rdev) { - int r, i, idx; + int r, i, j, idx; u32 tmp; bool use_doorbell = true; u64 hqd_gpu_addr; @@ -4922,7 +4922,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev) mqd->queue_state.cp_hqd_pq_wptr= 0; if (RREG32(CP_HQD_ACTIVE) & 1) { WREG32(CP_HQD_DEQUEUE_REQUEST, 1); - for (i = 0; i < rdev->usec_timeout; i++) { + for (j = 0; j < rdev->usec_timeout; j++) { if (!(RREG32(CP_HQD_ACTIVE) & 1)) break; udelay(1); |