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authorAlexandre Courbot <acourbot@nvidia.com>2016-12-14 17:02:42 +0900
committerBen Skeggs <bskeggs@redhat.com>2017-02-17 15:14:31 +1000
commit3454a034b715a3b89f8efb92508ccc9fbee17e6f (patch)
tree276b5670986a8fe6403dbed3c70ef4de343e5c2f /drivers/gpu/drm/nouveau/nvkm/subdev
parent555cafb40445861c121422b157c74fe2de793e68 (diff)
downloadtalos-obmc-linux-3454a034b715a3b89f8efb92508ccc9fbee17e6f.tar.gz
talos-obmc-linux-3454a034b715a3b89f8efb92508ccc9fbee17e6f.zip
drm/nouveau/secboot: disable falcon interrupts when running blob
Make sure we are not disturbed by spurious interrupts, as we poll the halt bit anyway. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c
index f6a11e2a8434..2fcb2f761a54 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -27,6 +27,7 @@
#include <core/gpuobj.h>
#include <subdev/fb.h>
#include <engine/falcon.h>
+#include <subdev/mc.h>
/**
* gm200_secboot_run_blob() - run the given high-secure blob
@@ -63,6 +64,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob)
if (ret)
goto end;
+ /* Disable interrupts as we will poll for the HALT bit */
+ nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false);
+
/* Start the HS bootloader */
nvkm_falcon_set_start_addr(falcon, sb->acr->start_address);
nvkm_falcon_start(falcon);
@@ -79,6 +83,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob)
}
end:
+ /* Reenable interrupts */
+ nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, true);
+
/* We don't need the ACR firmware anymore */
nvkm_gpuobj_unmap(&vma);
nvkm_falcon_put(falcon, subdev);
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