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| author | Ben Skeggs <bskeggs@redhat.com> | 2010-09-16 15:25:25 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-09-24 16:26:49 +1000 |
| commit | 855a95e4fc2ac6b758145ca7d6a0c95b66a57ef8 (patch) | |
| tree | a8536a4799ee31a97186d44c6bdb5fa90f6e3919 /drivers/gpu/drm/nouveau/nouveau_calc.c | |
| parent | f9aafdd30ef8356f0a3690bf9bdd9c6e51b7705c (diff) | |
| download | talos-obmc-linux-855a95e4fc2ac6b758145ca7d6a0c95b66a57ef8.tar.gz talos-obmc-linux-855a95e4fc2ac6b758145ca7d6a0c95b66a57ef8.zip | |
drm/nouveau: make the behaviour of get_pll_limits() consistent
This replaces all the pll_types definitions for ones that match the types
used in the tables in recent VBIOS versions.
get_pll_limits() will now accept either type or register value as input
across all limits table versions, and will store the actual register ID
that a PLL type refers to in the returned structure.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_calc.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_calc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_calc.c b/drivers/gpu/drm/nouveau/nouveau_calc.c index 23d9896962f4..dad96cce5e39 100644 --- a/drivers/gpu/drm/nouveau/nouveau_calc.c +++ b/drivers/gpu/drm/nouveau/nouveau_calc.c @@ -198,8 +198,8 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp, struct drm_nouveau_private *dev_priv = dev->dev_private; struct nv_fifo_info fifo_data; struct nv_sim_state sim_data; - int MClk = nouveau_hw_get_clock(dev, MPLL); - int NVClk = nouveau_hw_get_clock(dev, NVPLL); + int MClk = nouveau_hw_get_clock(dev, PLL_MEMORY); + int NVClk = nouveau_hw_get_clock(dev, PLL_CORE); uint32_t cfg1 = nvReadFB(dev, NV04_PFB_CFG1); sim_data.pclk_khz = VClk; |
