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authorDave Airlie <airlied@redhat.com>2018-09-11 11:52:54 +1000
committerDave Airlie <airlied@redhat.com>2018-09-11 11:53:12 +1000
commitb1c1566822ab489a945dfdafee651aa29de160c7 (patch)
tree3e8e035ab581dac7ce3b77ce4a7b6ab6f14b29ea /drivers/gpu/drm/i915/selftests/intel_hangcheck.c
parent1f3eb3461f58a4c48da67af4a8c4deb4d3c97214 (diff)
parenta28957b8f10be714f076fb3981a3b1a0318c48c2 (diff)
downloadtalos-obmc-linux-b1c1566822ab489a945dfdafee651aa29de160c7.tar.gz
talos-obmc-linux-b1c1566822ab489a945dfdafee651aa29de160c7.zip
Merge tag 'drm-intel-next-2018-09-06-2' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Merge tag 'gvt-next-2018-09-04' drm-intel-next-2018-09-06-1: UAPI Changes: - GGTT coherency GETPARAM: GGTT has turned out to be non-coherent for some platforms, which we've failed to communicate to userspace so far. SNA was modified to do extra flushing on non-coherent GGTT access, while Mesa will mitigate by always requiring WC mapping (which is non-coherent anyway). - Neuter Resource Streamer uAPI: There never really were users for the feature, so neuter it while keeping the interface bits for compatibility. This is a long due item from past. Cross-subsystem Changes: - Backmerge of branch drm-next-4.19 for DP_DPCD_REV_14 changes Core Changes: - None Driver Changes: - A load of Icelake (ICL) enabling patches (Paulo, Manasi) - Enabled full PPGTT for IVB,VLV and HSW (Chris) - Bugzilla #107113: Distribute DDB based on display resolutions (Mahesh) - Bugzillas #100023,#107476,#94921: Support limited range DP displays (Jani) - Bugzilla #107503: Increase LSPCON timeout (Fredrik) - Avoid boosting GPU due to an occasional stall in interactive workloads (Chris) - Apply GGTT coherency W/A only for affected systems instead of all (Chris) - Fix for infinite link training loop for faulty USB-C MST hubs (Nathan) - Keep KMS functional on Gen4 and earlier when GPU is wedged (Chris) - Stop holding ppGTT reference from closed VMAs (Chris) - Clear error registers after error capture (Lionel) - Various Icelake fixes (Anusha, Jyoti, Ville, Tvrtko) - Add missing Coffeelake (CFL) PCI IDs (Rodrigo) - Flush execlists tasklet directly from reset-finish (Chris) - Fix LPE audio runtime PM (Chris) - Fix detection of out of range surface positions (GLK/CNL) (Ville) - Remove wait-for-idle for PSR2 (Dhinakaran) - Power down existing display hardware resources when display is disabled (Chris) - Don't allow runtime power management if RC6 doesn't exist (Chris) - Add debugging checks for runtime power management paths (Imre) - Increase symmetry in display power init/fini paths (Imre) - Isolate GVT specific macros from i915_reg.h (Lucas) - Increase symmetry in power management enable/disable paths (Chris) - Increase IP disable timeout to 100 ms to avoid DRM_ERROR (Imre) - Fix memory leak from HDMI HDCP write function (Brian, Rodrigo) - Reject Y/Yf tiling on interlaced modes (Ville) - Use a cached mapping for the physical HWS on older gens (Chris) - Force slow path of writing relocations to buffer if unable to write to userspace (Chris) - Do a full device reset after being wedged (Chris) - Keep forcewake counts over reset (in case of debugfs user) (Imre, Chris) - Avoid false-positive errors from power wells during init (Imre) - Reset engines forcibly in exchange of declaring whole device wedged (Mika) - Reduce context HW ID lifetime in preparation for Icelake (Chris) - Attempt to recover from module load failures (Chris) - Keep select interrupts over a reset to avoid missing/losing them (Chris) - GuC submission backend improvements (Jakub) - Terminate context images with BB_END (Chris, Lionel) - Make GCC evaluate GGTT view struct size assertions again (Ville) - Add selftest to exercise suspend/hibernate code-paths for GEM (Chris) - Use a full emulation of a user ppgtt context in selftests (Chris) - Exercise resetting in the middle of a wait-on-fence in selftests (Chris) - Fix coherency issues on selftests for Baytrail (Chris) - Various other GEM fixes / self-test updates (Chris, Matt) - GuC doorbell self-tests (Daniele) - PSR mode control through debugfs for IGTs (Maarten) - Degrade expected WM latency errors to DRM_DEBUG_KMS (Chris) - Cope with errors better in MST link training (Dhinakaran) - Fix WARN on KBL external displays (Azhar) - Power well code cleanups (Imre) - Fixes to PSR debugging (Dhinakaran) - Make forcewake errors louder for easier catching in CI (WARNs) (Chris) - Fortify tiling code against programmer errors (Chris) - Bunch of fixes for CI exposed corner cases (multiple authors, mostly Chris) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180907105446.GA22860@jlahtine-desk.ger.corp.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/intel_hangcheck.c')
-rw-r--r--drivers/gpu/drm/i915/selftests/intel_hangcheck.c101
1 files changed, 89 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 65d66cdedd26..db378226ac10 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -1018,8 +1018,41 @@ static int evict_vma(void *data)
return err;
}
+static int evict_fence(void *data)
+{
+ struct evict_vma *arg = data;
+ struct drm_i915_private *i915 = arg->vma->vm->i915;
+ int err;
+
+ complete(&arg->completion);
+
+ mutex_lock(&i915->drm.struct_mutex);
+
+ /* Mark the fence register as dirty to force the mmio update. */
+ err = i915_gem_object_set_tiling(arg->vma->obj, I915_TILING_Y, 512);
+ if (err) {
+ pr_err("Invalid Y-tiling settings; err:%d\n", err);
+ goto out_unlock;
+ }
+
+ err = i915_vma_pin_fence(arg->vma);
+ if (err) {
+ pr_err("Unable to pin Y-tiled fence; err:%d\n", err);
+ goto out_unlock;
+ }
+
+ i915_vma_unpin_fence(arg->vma);
+
+out_unlock:
+ mutex_unlock(&i915->drm.struct_mutex);
+
+ return err;
+}
+
static int __igt_reset_evict_vma(struct drm_i915_private *i915,
- struct i915_address_space *vm)
+ struct i915_address_space *vm,
+ int (*fn)(void *),
+ unsigned int flags)
{
struct drm_i915_gem_object *obj;
struct task_struct *tsk = NULL;
@@ -1040,12 +1073,20 @@ static int __igt_reset_evict_vma(struct drm_i915_private *i915,
if (err)
goto unlock;
- obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ obj = i915_gem_object_create_internal(i915, SZ_1M);
if (IS_ERR(obj)) {
err = PTR_ERR(obj);
goto fini;
}
+ if (flags & EXEC_OBJECT_NEEDS_FENCE) {
+ err = i915_gem_object_set_tiling(obj, I915_TILING_X, 512);
+ if (err) {
+ pr_err("Invalid X-tiling settings; err:%d\n", err);
+ goto out_obj;
+ }
+ }
+
arg.vma = i915_vma_instance(obj, vm, NULL);
if (IS_ERR(arg.vma)) {
err = PTR_ERR(arg.vma);
@@ -1059,11 +1100,28 @@ static int __igt_reset_evict_vma(struct drm_i915_private *i915,
}
err = i915_vma_pin(arg.vma, 0, 0,
- i915_vma_is_ggtt(arg.vma) ? PIN_GLOBAL : PIN_USER);
- if (err)
+ i915_vma_is_ggtt(arg.vma) ?
+ PIN_GLOBAL | PIN_MAPPABLE :
+ PIN_USER);
+ if (err) {
+ i915_request_add(rq);
goto out_obj;
+ }
+
+ if (flags & EXEC_OBJECT_NEEDS_FENCE) {
+ err = i915_vma_pin_fence(arg.vma);
+ if (err) {
+ pr_err("Unable to pin X-tiled fence; err:%d\n", err);
+ i915_vma_unpin(arg.vma);
+ i915_request_add(rq);
+ goto out_obj;
+ }
+ }
+
+ err = i915_vma_move_to_active(arg.vma, rq, flags);
- err = i915_vma_move_to_active(arg.vma, rq, EXEC_OBJECT_WRITE);
+ if (flags & EXEC_OBJECT_NEEDS_FENCE)
+ i915_vma_unpin_fence(arg.vma);
i915_vma_unpin(arg.vma);
i915_request_get(rq);
@@ -1086,7 +1144,7 @@ static int __igt_reset_evict_vma(struct drm_i915_private *i915,
init_completion(&arg.completion);
- tsk = kthread_run(evict_vma, &arg, "igt/evict_vma");
+ tsk = kthread_run(fn, &arg, "igt/evict_vma");
if (IS_ERR(tsk)) {
err = PTR_ERR(tsk);
tsk = NULL;
@@ -1137,29 +1195,47 @@ static int igt_reset_evict_ggtt(void *arg)
{
struct drm_i915_private *i915 = arg;
- return __igt_reset_evict_vma(i915, &i915->ggtt.vm);
+ return __igt_reset_evict_vma(i915, &i915->ggtt.vm,
+ evict_vma, EXEC_OBJECT_WRITE);
}
static int igt_reset_evict_ppgtt(void *arg)
{
struct drm_i915_private *i915 = arg;
struct i915_gem_context *ctx;
+ struct drm_file *file;
int err;
+ file = mock_file(i915);
+ if (IS_ERR(file))
+ return PTR_ERR(file);
+
mutex_lock(&i915->drm.struct_mutex);
- ctx = kernel_context(i915);
+ ctx = live_context(i915, file);
mutex_unlock(&i915->drm.struct_mutex);
- if (IS_ERR(ctx))
- return PTR_ERR(ctx);
+ if (IS_ERR(ctx)) {
+ err = PTR_ERR(ctx);
+ goto out;
+ }
err = 0;
if (ctx->ppgtt) /* aliasing == global gtt locking, covered above */
- err = __igt_reset_evict_vma(i915, &ctx->ppgtt->vm);
+ err = __igt_reset_evict_vma(i915, &ctx->ppgtt->vm,
+ evict_vma, EXEC_OBJECT_WRITE);
- kernel_context_close(ctx);
+out:
+ mock_file_free(i915, file);
return err;
}
+static int igt_reset_evict_fence(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+
+ return __igt_reset_evict_vma(i915, &i915->ggtt.vm,
+ evict_fence, EXEC_OBJECT_NEEDS_FENCE);
+}
+
static int wait_for_others(struct drm_i915_private *i915,
struct intel_engine_cs *exclude)
{
@@ -1409,6 +1485,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_reset_wait),
SUBTEST(igt_reset_evict_ggtt),
SUBTEST(igt_reset_evict_ppgtt),
+ SUBTEST(igt_reset_evict_fence),
SUBTEST(igt_handle_error),
};
bool saved_hangcheck;
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