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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-12 13:53:37 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-08 10:23:53 +0100
commit23f09ce31ca68af3728ac5eed3e3efb03c5f990a (patch)
tree12ecc7a2794fa9853278edf1ea0499d65a3ec29a /drivers/gpu/drm/i915/intel_overlay.c
parent5dcdbcb06badbdf2faa698bf3198e421a1e12840 (diff)
downloadtalos-obmc-linux-23f09ce31ca68af3728ac5eed3e3efb03c5f990a.tar.gz
talos-obmc-linux-23f09ce31ca68af3728ac5eed3e3efb03c5f990a.zip
drm/i915/overlay: Make the overlay control struct opaque.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_overlay.c')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 3533355c5ea3..0a7d3e688060 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -170,6 +170,29 @@ struct overlay_registers {
u16 RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES];
};
+struct intel_overlay {
+ struct drm_device *dev;
+ struct intel_crtc *crtc;
+ struct drm_i915_gem_object *vid_bo;
+ struct drm_i915_gem_object *old_vid_bo;
+ int active;
+ int pfit_active;
+ u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
+ u32 color_key;
+ u32 brightness, contrast, saturation;
+ u32 old_xscale, old_yscale;
+ /* register access */
+ u32 flip_addr;
+ struct drm_i915_gem_object *reg_bo;
+ /* flip handling */
+ uint32_t last_flip_req;
+ int hw_wedged;
+#define HW_WEDGED 1
+#define NEEDS_WAIT_FOR_FLIP 2
+#define RELEASE_OLD_VID 3
+#define SWITCH_OFF 4
+};
+
static struct overlay_registers *
intel_overlay_map_regs_atomic(struct intel_overlay *overlay,
int slot)
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