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| author | Arun Siluvery <arun.siluvery@linux.intel.com> | 2015-04-07 14:01:33 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-10 08:55:58 +0200 |
| commit | 51847fb99f25fe1bf4bc6739f9d8ac85fa2c2a65 (patch) | |
| tree | f888b75c0a310097c729803658754c4eb90d1b6c /drivers/gpu/drm/i915/intel_lrc.c | |
| parent | b833bb61fd905a8d2c7392d1bc5fedf34921e251 (diff) | |
| download | talos-obmc-linux-51847fb99f25fe1bf4bc6739f9d8ac85fa2c2a65.tar.gz talos-obmc-linux-51847fb99f25fe1bf4bc6739f9d8ac85fa2c2a65.zip | |
drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor
According to Spec this is a reserved bit for Gen9+ and should not be set.
Change-Id: I0215fb7057b94139b7a2f90ecc7a0201c0c93ad4
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 1c3834fc5608..cfc73ea59804 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -265,7 +265,8 @@ static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring, desc = GEN8_CTX_VALID; desc |= LEGACY_CONTEXT << GEN8_CTX_MODE_SHIFT; - desc |= GEN8_CTX_L3LLC_COHERENT; + if (IS_GEN8(ctx_obj->base.dev)) + desc |= GEN8_CTX_L3LLC_COHERENT; desc |= GEN8_CTX_PRIVILEGE; desc |= lrca; desc |= (u64)intel_execlists_ctx_id(ctx_obj) << GEN8_CTX_ID_SHIFT; |
