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authorEric Anholt <eric@anholt.net>2009-12-01 11:56:30 -0800
committerEric Anholt <eric@anholt.net>2009-12-01 11:56:30 -0800
commitf0217c42c9ab3d772e543f635ce628b9478f70b6 (patch)
tree01dfcd607f90f250fb27cb303747b3d770879742 /drivers/gpu/drm/i915/i915_suspend.c
parentd09c23de9f967a7b7dcee0ffc57222ddbd821aba (diff)
downloadtalos-obmc-linux-f0217c42c9ab3d772e543f635ce628b9478f70b6.tar.gz
talos-obmc-linux-f0217c42c9ab3d772e543f635ce628b9478f70b6.zip
drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
This is a sync of a fix I made in the old UMS code. If the BIOS uses the GMBUS and doesn't clear that setup, then our bit-banging I2C can fail, leading to monitors not being detected. Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index cd10d9b8181f..c5a6df93e1b6 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -27,7 +27,7 @@
#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
-#include "i915_drv.h"
+#include "intel_drv.h"
static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
{
@@ -816,6 +816,9 @@ int i915_restore_state(struct drm_device *dev)
for (i = 0; i < 3; i++)
I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
+ /* I2C state */
+ intel_i2c_reset_gmbus(dev);
+
return 0;
}
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