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authorChris Wilson <chris@chris-wilson.co.uk>2010-10-24 10:28:47 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-23 20:19:13 +0000
commit748ebc6017a943ec065e653e975a5e8dace77ac6 (patch)
tree4e21eba7ccc84151496bb61d5132d0af0007d611 /drivers/gpu/drm/i915/i915_irq.c
parent7bdc9ab00b1b0fdbb490f41c5c7c2fbc66fed9ee (diff)
downloadtalos-obmc-linux-748ebc6017a943ec065e653e975a5e8dace77ac6.tar.gz
talos-obmc-linux-748ebc6017a943ec065e653e975a5e8dace77ac6.zip
drm/i915: Record fence registers on error.
Having seen the effects of erroneous fencing on the batchbuffer, a useful sanity check is to record the fence registers at the time of an error. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 09ac3bbd8165..de95c7bb6dba 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -581,6 +581,35 @@ static u32 capture_bo_list(struct drm_i915_error_buffer *err,
return i;
}
+static void i915_gem_record_fences(struct drm_device *dev,
+ struct drm_i915_error_state *error)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ int i;
+
+ /* Fences */
+ switch (INTEL_INFO(dev)->gen) {
+ case 6:
+ for (i = 0; i < 16; i++)
+ error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
+ break;
+ case 5:
+ case 4:
+ for (i = 0; i < 16; i++)
+ error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
+ break;
+ case 3:
+ if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
+ for (i = 0; i < 8; i++)
+ error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
+ case 2:
+ for (i = 0; i < 8; i++)
+ error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
+ break;
+
+ }
+}
+
/**
* i915_capture_error_state - capture an error record for later analysis
* @dev: drm device
@@ -656,6 +685,7 @@ static void i915_capture_error_state(struct drm_device *dev)
error->acthd = I915_READ(ACTHD);
error->bbaddr = 0;
}
+ i915_gem_record_fences(dev, error);
bbaddr = i915_ringbuffer_last_batch(dev, &dev_priv->render_ring);
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