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| author | Eric Anholt <eric@anholt.net> | 2009-10-22 16:11:14 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-02-26 13:23:17 -0800 |
| commit | bad720ff3e8e47a04bd88d9bbc8317e7d7e049d3 (patch) | |
| tree | f799c660fbe0530398366f46da0fb25381b78978 /drivers/gpu/drm/i915/i915_gem_tiling.c | |
| parent | 1089e3009572e07a1fe12c3408828f27c96453be (diff) | |
| download | talos-obmc-linux-bad720ff3e8e47a04bd88d9bbc8317e7d7e049d3.tar.gz talos-obmc-linux-bad720ff3e8e47a04bd88d9bbc8317e7d7e049d3.zip | |
drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 20653776965a..b5c55d88ff76 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -92,7 +92,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; - if (IS_IRONLAKE(dev)) { + if (IS_IRONLAKE(dev) || IS_GEN6(dev)) { /* On Ironlake whatever DRAM config, GPU always do * same swizzling setup. */ |
