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authorRodrigo Vivi <rodrigo.vivi@intel.com>2015-05-28 11:07:11 -0700
committerJani Nikula <jani.nikula@intel.com>2015-06-26 11:50:23 +0300
commitac88cd738425e04dbed3706621cf613a00708834 (patch)
treebe1b25802f24a63a27d5448979f6b3b5c7647d5b /drivers/gpu/drm/i915/dvo.h
parent9044a81d1be632251b7ee97ce9a0bf2a97989be6 (diff)
downloadtalos-obmc-linux-ac88cd738425e04dbed3706621cf613a00708834.tar.gz
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drm/i915: Fix IPS related flicker
We cannot let IPS enabled with no plane on the pipe: BSpec: "IPS cannot be enabled until after at least one plane has been enabled for at least one vertical blank." and "IPS must be disabled while there is still at least one plane enabled on the same pipe as IPS." This restriction apply to HSW and BDW. However a shortcut path on update primary plane function to make primary plane invisible by setting DSPCTRL to 0 was leting IPS enabled while there was no other plane enabled on the pipe causing flickerings that we were believing that it was caused by that other restriction where ips cannot be used when pixel rate is greater than 95% of cdclok. v2: Don't mess with Atomic path as pointed out by Ville. Reference: https://bugs.freedesktop.org/show_bug.cgi?id=85583 Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/dvo.h')
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