diff options
| author | Alan Cox <alan@linux.intel.com> | 2012-03-08 16:02:05 +0000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2012-03-10 13:05:44 +0000 |
| commit | c6265ff593467d472814aa9f16f89f6c1dc90a5d (patch) | |
| tree | 2b1b8251a2ddedcbd31a1668f5ecd5a685628a90 /drivers/gpu/drm/gma500/psb_intel_display.c | |
| parent | c715bc1bf422543731b8833e899266b8be982a52 (diff) | |
| download | talos-obmc-linux-c6265ff593467d472814aa9f16f89f6c1dc90a5d.tar.gz talos-obmc-linux-c6265ff593467d472814aa9f16f89f6c1dc90a5d.zip | |
gma500: rework register stuff sanely
Rework registers handling to prepare for Medfield.
Signed-off-by: Alan Cox <alan@linux.intel.com>
[split out from a single big patch]
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/psb_intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/gma500/psb_intel_display.c | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c index 4ba1ae8b5e30..eed91fdcf36e 100644 --- a/drivers/gpu/drm/gma500/psb_intel_display.c +++ b/drivers/gpu/drm/gma500/psb_intel_display.c @@ -845,7 +845,7 @@ void psb_intel_crtc_load_lut(struct drm_crtc *crtc) gma_power_end(dev); } else { for (i = 0; i < 256; i++) { - dev_priv->regs.save_palette_a[i] = + dev_priv->regs.psb.save_palette_a[i] = ((psb_intel_crtc->lut_r[i] + psb_intel_crtc->lut_adj[i]) << 16) | ((psb_intel_crtc->lut_g[i] + @@ -1141,18 +1141,19 @@ static int psb_intel_crtc_clock_get(struct drm_device *dev, gma_power_end(dev); } else { dpll = (pipe == 0) ? - dev_priv->regs.saveDPLL_A : dev_priv->regs.saveDPLL_B; + dev_priv->regs.psb.saveDPLL_A : + dev_priv->regs.psb.saveDPLL_B; if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0) fp = (pipe == 0) ? - dev_priv->regs.saveFPA0 : - dev_priv->regs.saveFPB0; + dev_priv->regs.psb.saveFPA0 : + dev_priv->regs.psb.saveFPB0; else fp = (pipe == 0) ? - dev_priv->regs.saveFPA1 : - dev_priv->regs.saveFPB1; + dev_priv->regs.psb.saveFPA1 : + dev_priv->regs.psb.saveFPB1; - is_lvds = (pipe == 1) && (dev_priv->regs.saveLVDS & + is_lvds = (pipe == 1) && (dev_priv->regs.psb.saveLVDS & LVDS_PORT_EN); } @@ -1219,17 +1220,17 @@ struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev, gma_power_end(dev); } else { htot = (pipe == 0) ? - dev_priv->regs.saveHTOTAL_A : - dev_priv->regs.saveHTOTAL_B; + dev_priv->regs.psb.saveHTOTAL_A : + dev_priv->regs.psb.saveHTOTAL_B; hsync = (pipe == 0) ? - dev_priv->regs.saveHSYNC_A : - dev_priv->regs.saveHSYNC_B; + dev_priv->regs.psb.saveHSYNC_A : + dev_priv->regs.psb.saveHSYNC_B; vtot = (pipe == 0) ? - dev_priv->regs.saveVTOTAL_A : - dev_priv->regs.saveVTOTAL_B; + dev_priv->regs.psb.saveVTOTAL_A : + dev_priv->regs.psb.saveVTOTAL_B; vsync = (pipe == 0) ? - dev_priv->regs.saveVSYNC_A : - dev_priv->regs.saveVSYNC_B; + dev_priv->regs.psb.saveVSYNC_A : + dev_priv->regs.psb.saveVSYNC_B; } mode = kzalloc(sizeof(*mode), GFP_KERNEL); |
