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authorJoonyoung Shim <jy0922.shim@samsung.com>2014-07-25 19:59:10 +0900
committerInki Dae <inki.dae@samsung.com>2014-08-04 13:39:27 +0900
commitf1e716d8f89b5e4bfde73e50b59694c421173015 (patch)
tree62b495d6252fa0b3df14a58360cc7675d5b1cd74 /drivers/gpu/drm/exynos
parent39b58a396d36500b79da7d07037566761ad7f2ad (diff)
downloadtalos-obmc-linux-f1e716d8f89b5e4bfde73e50b59694c421173015.tar.gz
talos-obmc-linux-f1e716d8f89b5e4bfde73e50b59694c421173015.zip
drm/exynos: control blending of mixer graphic layer 0
The mixer graphic layer 0 isn't blended as default by commit 0377f4ed9f1aed30292c4e3c87f24e028ae26f36(drm/exynos: Don't blend mixer layer 0). But it needs to be blended with graphic layer 0 if video layer is enabled by vp because video layer is bottom. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos')
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 6756d1ca4923..e8b4ec84b312 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -365,6 +365,11 @@ static void mixer_cfg_layer(struct mixer_context *ctx, int win, bool enable)
vp_reg_writemask(res, VP_ENABLE, val, VP_ENABLE_ON);
mixer_reg_writemask(res, MXR_CFG, val,
MXR_CFG_VP_ENABLE);
+
+ /* control blending of graphic layer 0 */
+ mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,
+ MXR_GRP_CFG_BLEND_PRE_MUL |
+ MXR_GRP_CFG_PIXEL_BLEND_EN);
}
break;
}
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