summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/dce
diff options
context:
space:
mode:
authorEric Bernstein <eric.bernstein@amd.com>2018-05-25 11:57:26 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-06-15 12:24:50 -0500
commit12036586a368b8c949d4e6e57ae3b40c41daf17a (patch)
tree9efa99cbfe97f6b9c0848d93693de1f5c979108f /drivers/gpu/drm/amd/display/dc/dce
parentce3f6e82249cccbbfd919ad30d256ec62d06b4af (diff)
downloadtalos-obmc-linux-12036586a368b8c949d4e6e57ae3b40c41daf17a.tar.gz
talos-obmc-linux-12036586a368b8c949d4e6e57ae3b40c41daf17a.zip
drm/amd/display: Allow DP register double buffer
Remove setting DP_DB_DISABLE to avoid issues when changing bit depth after vbios take over. Refactor code to perform single register update for both pixel encoding and component depth fields. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index c0e813c7ddd4..91642e684858 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -289,11 +289,6 @@ static void dce110_stream_encoder_dp_set_stream_attribute(
struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
- if (REG(DP_DB_CNTL))
- REG_UPDATE(DP_DB_CNTL, DP_DB_DISABLE, 1);
-#endif
-
/* set pixel encoding */
switch (crtc_timing->pixel_encoding) {
case PIXEL_ENCODING_YCBCR422:
OpenPOWER on IntegriCloud