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| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2018-05-23 17:52:04 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-07-05 16:38:28 -0500 |
| commit | e2e0a1dcd3229eec32ded439f69438a25ec817d6 (patch) | |
| tree | 80ab27498058b7bbcf8c813428d905b9d5e91aac /drivers/gpu/drm/amd/display/dc/calcs | |
| parent | 6ca11246180a6e5e6b5b668545c2575b304c9f7f (diff) | |
| download | talos-obmc-linux-e2e0a1dcd3229eec32ded439f69438a25ec817d6.tar.gz talos-obmc-linux-e2e0a1dcd3229eec32ded439f69438a25ec817d6.zip | |
drm/amd/display: move clock programming from set_bandwidth to dccg
This change moves dcn clock programming(with exception of dispclk)
into dccg. This should have no functional effect.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/calcs')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c index 2b70ac67e6c2..9acdd9da740e 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c @@ -997,7 +997,7 @@ bool dcn_validate_bandwidth( } context->bw.dcn.calc_clk.dppclk_khz = context->bw.dcn.calc_clk.dispclk_khz / v->dispclk_dppclk_ratio; - + context->bw.dcn.calc_clk.phyclk_khz = v->phyclk_per_state[v->voltage_level]; switch (v->voltage_level) { case 0: context->bw.dcn.calc_clk.max_supported_dppclk_khz = |
