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| author | Wu Hao <hao.wu@intel.com> | 2018-06-30 08:53:30 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-15 13:55:46 +0200 |
| commit | 1a1527cf5ddacc6716a3cacfa232111d92ffd93b (patch) | |
| tree | b0adb5811cb0cd0dcd8bdab87fe4893472114b09 /drivers/fpga/Kconfig | |
| parent | 7514a4249c479c0b56a112306496a9aa3bad312b (diff) | |
| download | talos-obmc-linux-1a1527cf5ddacc6716a3cacfa232111d92ffd93b.tar.gz talos-obmc-linux-1a1527cf5ddacc6716a3cacfa232111d92ffd93b.zip | |
fpga: dfl: add FPGA Accelerated Function Unit driver basic framework
On DFL FPGA devices, the Accelerated Function Unit (AFU), can be
reprogrammed for different functions. It connects to the FPGA
infrastructure (static FPGA region) via a Port. Port CSRs are
implemented separately from the AFU CSRs to provide control and
status of the Port. Once valid PR bitstream is programmed into
the AFU, it allows access to the AFU CSRs in the AFU MMIO space.
This patch only implements basic driver framework for AFU, including
device file operation framework.
Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
Signed-off-by: Shiva Rao <shiva.rao@intel.com>
Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/Kconfig')
| -rw-r--r-- | drivers/fpga/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index f99f422feec9..1ebcef4bab5b 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -174,6 +174,15 @@ config FPGA_DFL_FME_REGION help Say Y to enable FPGA Region driver for FPGA Management Engine. +config FPGA_DFL_AFU + tristate "FPGA DFL AFU Driver" + depends on FPGA_DFL + help + This is the driver for FPGA Accelerated Function Unit (AFU) which + implements AFU and Port management features. A User AFU connects + to the FPGA infrastructure via a Port. There may be more than one + Port/AFU per DFL based FPGA device. + config FPGA_DFL_PCI tristate "FPGA DFL PCIe Device Driver" depends on PCI && FPGA_DFL |
