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authorChris Leech <christopher.leech@intel.com>2006-05-23 17:35:34 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2006-06-17 21:18:46 -0700
commit0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1 (patch)
tree0c3d8528c31e8291fb78c2e7a287910987ed2888 /drivers/dma/ioatdma_hw.h
parentc13c8260da3155f2cefb63b0d1b7dcdcb405c644 (diff)
downloadtalos-obmc-linux-0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1.tar.gz
talos-obmc-linux-0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1.zip
[I/OAT]: Driver for the Intel(R) I/OAT DMA engine
Adds a new ioatdma driver Signed-off-by: Chris Leech <christopher.leech@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/dma/ioatdma_hw.h')
-rw-r--r--drivers/dma/ioatdma_hw.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/drivers/dma/ioatdma_hw.h b/drivers/dma/ioatdma_hw.h
new file mode 100644
index 000000000000..4d7a12880be3
--- /dev/null
+++ b/drivers/dma/ioatdma_hw.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING.
+ */
+#ifndef _IOAT_HW_H_
+#define _IOAT_HW_H_
+
+/* PCI Configuration Space Values */
+#define IOAT_PCI_VID 0x8086
+#define IOAT_PCI_DID 0x1A38
+#define IOAT_PCI_RID 0x00
+#define IOAT_PCI_SVID 0x8086
+#define IOAT_PCI_SID 0x8086
+#define IOAT_VER 0x12 /* Version 1.2 */
+
+struct ioat_dma_descriptor {
+ uint32_t size;
+ uint32_t ctl;
+ uint64_t src_addr;
+ uint64_t dst_addr;
+ uint64_t next;
+ uint64_t rsv1;
+ uint64_t rsv2;
+ uint64_t user1;
+ uint64_t user2;
+};
+
+#define IOAT_DMA_DESCRIPTOR_CTL_INT_GN 0x00000001
+#define IOAT_DMA_DESCRIPTOR_CTL_SRC_SN 0x00000002
+#define IOAT_DMA_DESCRIPTOR_CTL_DST_SN 0x00000004
+#define IOAT_DMA_DESCRIPTOR_CTL_CP_STS 0x00000008
+#define IOAT_DMA_DESCRIPTOR_CTL_FRAME 0x00000010
+#define IOAT_DMA_DESCRIPTOR_NUL 0x00000020
+#define IOAT_DMA_DESCRIPTOR_OPCODE 0xFF000000
+
+#endif
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