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author | John Crispin <john@phrozen.org> | 2017-01-23 13:48:26 +0100 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-21 19:20:33 -0700 |
commit | db9c4a1e6581e45976526eb45c032a73f944dd8a (patch) | |
tree | dc8de0575b77860b2343ca0c6d097050cd84adc3 /drivers/clk | |
parent | de000a88c159268e6bf8ac9c06de7d0a5f19f644 (diff) | |
download | talos-obmc-linux-db9c4a1e6581e45976526eb45c032a73f944dd8a.tar.gz talos-obmc-linux-db9c4a1e6581e45976526eb45c032a73f944dd8a.zip |
clk: mediatek: add mt2701 ethernet reset
The ethernet clock core has a reset register that is currently not exposed
to the user. Fix this by adding the missing registration code.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/mediatek/clk-mt2701-eth.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/clk-mt2701-eth.c b/drivers/clk/mediatek/clk-mt2701-eth.c index 877be8715afa..9251a6551522 100644 --- a/drivers/clk/mediatek/clk-mt2701-eth.c +++ b/drivers/clk/mediatek/clk-mt2701-eth.c @@ -66,6 +66,8 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev) "could not register clock provider: %s: %d\n", pdev->name, r); + mtk_register_reset_controller(node, 1, 0x34); + return r; } |