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| author | Shawn Guo <shawn.guo@linaro.org> | 2013-03-26 21:22:55 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-01 16:30:04 +0800 |
| commit | 0c672aae287ef0b9a12a1ca67c1ad7a4bbe470ac (patch) | |
| tree | e70b2a021b7dfaaec8a9a54a6174ce0cd1681115 /drivers/clk/mxs/clk-imx23.c | |
| parent | 38d6590f0f54ad85a7e841ef6c2c6f0fc8e2e832 (diff) | |
| download | talos-obmc-linux-0c672aae287ef0b9a12a1ca67c1ad7a4bbe470ac.tar.gz talos-obmc-linux-0c672aae287ef0b9a12a1ca67c1ad7a4bbe470ac.zip | |
clk: mxs: remove the use of mach level IO accessor
It removes the use of mach level IO accessor __mxs_setl/clrl, and hence
removes mach header inclusion from clock driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/mxs/clk-imx23.c')
| -rw-r--r-- | drivers/clk/mxs/clk-imx23.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 0c8fda48d0a2..f6a74872f14e 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -16,7 +16,6 @@ #include <linux/io.h> #include <linux/of.h> #include <linux/of_address.h> -#include <mach/mx23.h> #include "clk.h" static void __iomem *clkctrl; @@ -52,10 +51,10 @@ static void __init clk_misc_init(void) u32 val; /* Gate off cpu clock in WFI for power saving */ - __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); + writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); /* Clear BYPASS for SAIF */ - __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ); + writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR); /* SAIF has to use frac div for functional operation */ val = readl_relaxed(SAIF); @@ -66,14 +65,14 @@ static void __init clk_misc_init(void) * Source ssp clock from ref_io than ref_xtal, * as ref_xtal only provides 24 MHz as maximum. */ - __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ); + writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR); /* * 480 MHz seems too high to be ssp clock source directly, * so set frac to get a 288 MHz ref_io. */ - __mxs_clrl(0x3f << BP_FRAC_IOFRAC, FRAC); - __mxs_setl(30 << BP_FRAC_IOFRAC, FRAC); + writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR); + writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET); } static const char *sel_pll[] __initconst = { "pll", "ref_xtal", }; |
