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authorTom Lendacky <thomas.lendacky@amd.com>2017-12-26 23:43:54 -0600
committerThomas Gleixner <tglx@linutronix.de>2018-01-03 15:57:59 +0100
commit694d99d40972f12e59a3696effee8a376b79d7c8 (patch)
tree91b9a122670a807534c2ed283789406deec2e1b4 /arch
parent87faa0d9b43b4755ff6963a22d1fd1bee1aa3b39 (diff)
downloadtalos-obmc-linux-694d99d40972f12e59a3696effee8a376b79d7c8.tar.gz
talos-obmc-linux-694d99d40972f12e59a3696effee8a376b79d7c8.zip
x86/cpu, x86/pti: Do not enable PTI on AMD processors
AMD processors are not subject to the types of attacks that the kernel page table isolation feature protects against. The AMD microarchitecture does not allow memory references, including speculative references, that access higher privileged data when running in a lesser privileged mode when that access would result in a page fault. Disable page table isolation by default on AMD processors by not setting the X86_BUG_CPU_INSECURE feature, which controls whether X86_FEATURE_PTI is set. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20171227054354.20369.94587.stgit@tlendack-t1.amdoffice.net
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index f2a94dfb434e..b1be494ab4e8 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -899,8 +899,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
setup_force_cpu_cap(X86_FEATURE_ALWAYS);
- /* Assume for now that ALL x86 CPUs are insecure */
- setup_force_cpu_bug(X86_BUG_CPU_INSECURE);
+ if (c->x86_vendor != X86_VENDOR_AMD)
+ setup_force_cpu_bug(X86_BUG_CPU_INSECURE);
fpu__init_system(c);
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