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| author | Peter Zijlstra <a.p.zijlstra@chello.nl> | 2010-03-25 14:51:49 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2010-03-26 09:41:03 +0100 |
| commit | 7c5ecaf7666617889f337296c610815b519abfa9 (patch) | |
| tree | 684b2c01b2b6aa9bacc65f63fa26b522c0da7982 /arch/x86/kernel/cpu/perf_event_intel_lbr.c | |
| parent | 5a10317483f606106395814ee2fdaa2f1256a3b3 (diff) | |
| download | talos-obmc-linux-7c5ecaf7666617889f337296c610815b519abfa9.tar.gz talos-obmc-linux-7c5ecaf7666617889f337296c610815b519abfa9.zip | |
perf, x86: Clean up debugctlmsr bit definitions
Move all debugctlmsr thingies into msr-index.h
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <20100325135413.861425293@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel_lbr.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_lbr.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c index df4c98e26c5b..d202c1bece1a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c @@ -12,15 +12,12 @@ enum { * otherwise it becomes near impossible to get a reliable stack. */ -#define X86_DEBUGCTL_LBR (1 << 0) -#define X86_DEBUGCTL_FREEZE_LBRS_ON_PMI (1 << 11) - static void __intel_pmu_lbr_enable(void) { u64 debugctl; rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); - debugctl |= (X86_DEBUGCTL_LBR | X86_DEBUGCTL_FREEZE_LBRS_ON_PMI); + debugctl |= (DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); } @@ -29,7 +26,7 @@ static void __intel_pmu_lbr_disable(void) u64 debugctl; rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); - debugctl &= ~(X86_DEBUGCTL_LBR | X86_DEBUGCTL_FREEZE_LBRS_ON_PMI); + debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); } |
