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| author | Olof Johansson <olof@lixom.net> | 2012-03-10 09:15:30 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-03-10 09:15:30 -0800 |
| commit | c454f813501b94cd687bf3c5c0783f815a854905 (patch) | |
| tree | 8b6e1719ba4470e478d719ca0cf935501370e237 /arch/x86/kernel/cpu/perf_event_amd.c | |
| parent | 1ad4fb2f7cbc21db9cdbb53e25ce348d93bbd6e7 (diff) | |
| parent | 63fc5f3bb3d0ca9ab4767a801b518aa6335f87ad (diff) | |
| download | talos-obmc-linux-c454f813501b94cd687bf3c5c0783f815a854905.tar.gz talos-obmc-linux-c454f813501b94cd687bf3c5c0783f815a854905.zip | |
Merge branch 'board' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
* 'board' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: add minimal support for Nokia RM-696
ARM: OMAP: enable Bluetooth on the PandaBoard
ARM: OMAP: pandora: add support for backlight and poweroff
ARM: OMAP4: board-4430sdp: don't initialize value that is never used
ARM: OMAP3: cm-t3517: add EMAC support
ARM: OMAP: move generic EMAC init to separate file
ARM: OMAP3: RX-51: add explicit mux configuration of tsc2005 control gpios
ARM: OMAP: Add omap_reserve functionality
(includes sync-up to 3.3-rc6)
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_amd.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_amd.c | 37 |
1 files changed, 35 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c index 0397b23be8e9..67250a52430b 100644 --- a/arch/x86/kernel/cpu/perf_event_amd.c +++ b/arch/x86/kernel/cpu/perf_event_amd.c @@ -1,4 +1,5 @@ #include <linux/perf_event.h> +#include <linux/export.h> #include <linux/types.h> #include <linux/init.h> #include <linux/slab.h> @@ -357,7 +358,9 @@ static void amd_pmu_cpu_starting(int cpu) struct amd_nb *nb; int i, nb_id; - if (boot_cpu_data.x86_max_cores < 2) + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY; + + if (boot_cpu_data.x86_max_cores < 2 || boot_cpu_data.x86 == 0x15) return; nb_id = amd_get_nb_id(cpu); @@ -587,9 +590,9 @@ static __initconst const struct x86_pmu amd_pmu_f15h = { .put_event_constraints = amd_put_event_constraints, .cpu_prepare = amd_pmu_cpu_prepare, - .cpu_starting = amd_pmu_cpu_starting, .cpu_dead = amd_pmu_cpu_dead, #endif + .cpu_starting = amd_pmu_cpu_starting, }; __init int amd_pmu_init(void) @@ -621,3 +624,33 @@ __init int amd_pmu_init(void) return 0; } + +void amd_pmu_enable_virt(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + cpuc->perf_ctr_virt_mask = 0; + + /* Reload all events */ + x86_pmu_disable_all(); + x86_pmu_enable_all(0); +} +EXPORT_SYMBOL_GPL(amd_pmu_enable_virt); + +void amd_pmu_disable_virt(void) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + /* + * We only mask out the Host-only bit so that host-only counting works + * when SVM is disabled. If someone sets up a guest-only counter when + * SVM is disabled the Guest-only bits still gets set and the counter + * will not count anything. + */ + cpuc->perf_ctr_virt_mask = AMD_PERFMON_EVENTSEL_HOSTONLY; + + /* Reload all events */ + x86_pmu_disable_all(); + x86_pmu_enable_all(0); +} +EXPORT_SYMBOL_GPL(amd_pmu_disable_virt); |
