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authorNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>2013-07-01 21:08:47 +0530
committerTony Luck <tony.luck@intel.com>2013-07-08 11:53:01 -0700
commitc3d1fb567a634dcdff4c6f6095b2053260988336 (patch)
treebe2b0f39a3b489c4aa4b39d6c527be0c63146b92 /arch/x86/include/asm/mce.h
parent8bb495e3f02401ee6f76d1b1d77f3ac9f079e376 (diff)
downloadtalos-obmc-linux-c3d1fb567a634dcdff4c6f6095b2053260988336.tar.gz
talos-obmc-linux-c3d1fb567a634dcdff4c6f6095b2053260988336.zip
mce: acpi/apei: Honour Firmware First for MCA banks listed in APEI HEST CMC
The Corrected Machine Check structure (CMC) in HEST has a flag which can be set by the firmware to indicate to the OS that it prefers to process the corrected error events first. In this scenario, the OS is expected to not monitor for corrected errors (through CMCI/polling). Instead, the firmware notifies the OS on corrected error events through GHES. Linux already has support for GHES. This patch adds support for parsing CMC structure and to disable CMCI/polling if the firmware first flag is set. Further, the list of machine check bank structures at the end of CMC is used to determine which MCA banks function in FF mode, so that we continue to monitor error events on the other banks. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index fa5f71e021d5..9c91683ab5e6 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -188,6 +188,9 @@ extern void register_mce_write_callback(ssize_t (*)(struct file *filp,
const char __user *ubuf,
size_t usize, loff_t *off));
+/* Disable CMCI/polling for MCA bank claimed by firmware */
+extern void mce_disable_bank(int bank);
+
/*
* Exception handler
*/
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