diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2010-01-15 15:13:48 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-15 15:13:48 +0900 |
| commit | f0cb77372c3cf8c0cb17bbfb30a62506ea119286 (patch) | |
| tree | b002fb0d2ccbe0aa5131630d738188e9f5272fcb /arch/sh/kernel/cpu | |
| parent | a6198a238baceae9d4e0ce3915f6d239c89b5c08 (diff) | |
| download | talos-obmc-linux-f0cb77372c3cf8c0cb17bbfb30a62506ea119286.tar.gz talos-obmc-linux-f0cb77372c3cf8c0cb17bbfb30a62506ea119286.zip | |
sh: Fix up the secondary CPU entry point for 32bit mode.
Presently the secondary CPU entry point is only aimed at 29bit phys mode,
causing it to point to a stray virtual address in 32bit mode. Fix it up
after consulting with our shiny new __in_29bit_mode().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/smp-shx3.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c index 5863e0c4d02f..11bf4c1e25c0 100644 --- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c @@ -78,7 +78,10 @@ void __init plat_prepare_cpus(unsigned int max_cpus) void plat_start_cpu(unsigned int cpu, unsigned long entry_point) { - __raw_writel(entry_point, RESET_REG(cpu)); + if (__in_29bit_mode()) + __raw_writel(entry_point, RESET_REG(cpu)); + else + __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu)); if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP)) __raw_writel(STBCR_MSTP, STBCR_REG(cpu)); |
