diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-01-15 10:31:55 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:06 +0100 |
| commit | 7dc2834fd57e12b355ee80ae5edf134af7476a3b (patch) | |
| tree | 1638ba087ecd7c761b425cc60f67ca4b5a9acb6a /arch/mips | |
| parent | 237036de6540a377268db5bb2b9c8efdccbe51c1 (diff) | |
| download | talos-obmc-linux-7dc2834fd57e12b355ee80ae5edf134af7476a3b.tar.gz talos-obmc-linux-7dc2834fd57e12b355ee80ae5edf134af7476a3b.zip | |
MIPS: Malta: Probe CPC when supported
When CPC support is compiled into the kernel (ie. CONFIG_MIPS_CPC=y),
probe the CPC on boot for Malta in order to allow any users of the CPC
to detect its presence & function correctly.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6363/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/mips-boards/malta.h | 5 | ||||
| -rw-r--r-- | arch/mips/mti-malta/malta-init.c | 7 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mips-boards/malta.h b/arch/mips/include/asm/mips-boards/malta.h index 722bc889eab5..fd9774269a5e 100644 --- a/arch/mips/include/asm/mips-boards/malta.h +++ b/arch/mips/include/asm/mips-boards/malta.h @@ -64,6 +64,11 @@ static inline unsigned long get_msc_port_base(unsigned long reg) #define GIC_ADDRSPACE_SZ (128 * 1024) /* + * CPC Specific definitions + */ +#define CPC_BASE_ADDR 0x1bde0000 + +/* * MSC01 BIU Specific definitions * FIXME : These should be elsewhere ? */ diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index 85a62b036df0..1381365b8873 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c @@ -21,6 +21,7 @@ #include <asm/traps.h> #include <asm/fw/fw.h> #include <asm/mips-cm.h> +#include <asm/mips-cpc.h> #include <asm/mips-boards/generic.h> #include <asm/mips-boards/malta.h> @@ -110,6 +111,11 @@ static void __init mips_ejtag_setup(void) flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); } +phys_t mips_cpc_default_phys_base(void) +{ + return CPC_BASE_ADDR; +} + extern struct plat_smp_ops msmtc_smp_ops; void __init prom_init(void) @@ -277,6 +283,7 @@ mips_pci_controller: #endif /* Early detection of CMP support */ mips_cm_probe(); + mips_cpc_probe(); if (!register_cmp_smp_ops()) return; |
