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| author | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 19:40:13 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 19:40:13 +0100 |
| commit | 241738bd51cb0efe58e6c570223153e970afe3ae (patch) | |
| tree | 05263e1ec3fbd58cc4ba5ee69163612fbb769a4a /arch/mips/include/asm/mach-loongson1 | |
| parent | bdf20507da11a9a5b32ef04fa09f352828189aef (diff) | |
| parent | ce8f0d0607bcad3ec0e8599be80353204427093e (diff) | |
| download | talos-obmc-linux-241738bd51cb0efe58e6c570223153e970afe3ae.tar.gz talos-obmc-linux-241738bd51cb0efe58e6c570223153e970afe3ae.zip | |
Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/mach-loongson1')
| -rw-r--r-- | arch/mips/include/asm/mach-loongson1/platform.h | 3 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-loongson1/regs-clk.h | 7 |
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-loongson1/platform.h b/arch/mips/include/asm/mach-loongson1/platform.h index 2f171617bade..718a1228a4f3 100644 --- a/arch/mips/include/asm/mach-loongson1/platform.h +++ b/arch/mips/include/asm/mach-loongson1/platform.h @@ -18,6 +18,7 @@ extern struct platform_device ls1x_eth0_device; extern struct platform_device ls1x_ehci_device; extern struct platform_device ls1x_rtc_device; -void ls1x_serial_setup(void); +extern void __init ls1x_clk_init(void); +extern void __init ls1x_serial_setup(struct platform_device *pdev); #endif /* __ASM_MACH_LOONGSON1_PLATFORM_H */ diff --git a/arch/mips/include/asm/mach-loongson1/regs-clk.h b/arch/mips/include/asm/mach-loongson1/regs-clk.h index 8efa7fb9f73a..a81fa3d0dc91 100644 --- a/arch/mips/include/asm/mach-loongson1/regs-clk.h +++ b/arch/mips/include/asm/mach-loongson1/regs-clk.h @@ -20,14 +20,15 @@ /* Clock PLL Divisor Register Bits */ #define DIV_DC_EN (0x1 << 31) -#define DIV_DC (0x1f << 26) #define DIV_CPU_EN (0x1 << 25) -#define DIV_CPU (0x1f << 20) #define DIV_DDR_EN (0x1 << 19) -#define DIV_DDR (0x1f << 14) #define DIV_DC_SHIFT 26 #define DIV_CPU_SHIFT 20 #define DIV_DDR_SHIFT 14 +#define DIV_DC_WIDTH 5 +#define DIV_CPU_WIDTH 5 +#define DIV_DDR_WIDTH 5 + #endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */ |
